Baseless Next Generation Rumors with no Technical Merits [pre E3 2019] *spawn*

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Maybe it's a result of the required bandwidth like @turkey aluded to? I've looked at the current consoles for that and unlike discrete GPUs they all stay above 50 GB/s per TFLOP.

Code:
xbox one   ( 68 GB/s | 1.310 TFLOPs | 51.91 GB/s per TFLOP | doesn't inlcude ESRAM bandwidth)
ps4        (176 GB/s | 1.843 TFLOPs | 95.65 GB/s per TFLOP)
ps4 pro    (218 GB/s | 4.130 TFLOPs | 51.90 GB/s per TFLOP | + delta color compression)
xbox one x (326 GB/s | 6.001 TFLOPs | 54.33 GB/s per TFLOP | + delta color compression)

The fake would fit into that:

Code:
Lockhart               (336 GB/s |  5.587 TFLOPs | 60.14 GB/s per TFLOP)
Lockhart + RCC         (336 GB/s |  6.587 TFLOPs | 51.01 GB/s per TFLOP)
Anaconda               (672 GB/s | 11.174 TFLOPs | 60.14 GB/s per TFLOP)
Anaconda + RCC         (672 GB/s | 13.174 TFLOPs | 51.01 GB/s per TFLOP)
------------------------------------------------------------------------
Anaconda 352 bit       (616 GB/s | 11.174 TFLOPs | 55.13 GB/s per TFLOP)
Anaconda 352 bit + RCC (616 GB/s | 13.174 TFLOPs | 46.76 GB/s per TFLOP)
------------------------------------------------------------------------
Anaconda 320 bit       (560 GB/s | 11.174 TFLOPs | 50.12 GB/s per TFLOP)
Anaconda 320 bit + RCC (560 GB/s | 13.174 TFLOPs | 42.51 GB/s per TFLOP)
------------------------------------------------------------------------
Anaconda 288 bit       (505 GB/s | 11.174 TFLOPs | 45.19 GB/s per TFLOP)
Anaconda 288 bit + RCC (505 GB/s | 13.174 TFLOPs | 38.33 GB/s per TFLOP)
------------------------------------------------------------------------
Anaconda 256 bit       (448 GB/s | 11.174 TFLOPs | 40.09 GB/s per TFLOP)
Anaconda 256 bit + RCC (448 GB/s | 13.174 TFLOPs | 34.01 GB/s per TFLOP)


I guess the more bandwidth the merrier, but is it actually some hard limit for consoles with a shared memory pool to be over 50 GB/s per TFLOP? Maybe due to the fact that CPU bandwidth seem to reduce GPU bandwidth disproportionately like Sony says?

Slide 13: http://rdwest.playstation.com/wp-content/uploads/2014/11/ParisGC2013Final.pdf



That makes sense. Though I have to admit that I had hoped for more meaning behind that "insider" sentence.



Apparently it's 11 pages written text plus 5 pages data/drawings, so they had to make 16 A4 pages. Assuming their middleman tells the truth and really sat down with the faker then that would mean the faker had to train and memorize this stuff in order to answer questions...

But I'm not surprised anymore after the past leaks where people created 3d printed nintendo controllers (if my memory doesn't deceive me I think there was some 3d printed controller for Durango before the PS4 launch as well) and used 3d rendering to fool people.


Thank goodness the PS5 controller is a fake. Little controller screens are a rubbish* waste of BOM, especially when Xbox and Strada won't be doing it.

* My thoughts are in the thread for controller screens. Obviously milage varies, but I really feel it fails to provide the benefits people think it does.
 
Thank goodness the PS5 controller is a fake. Little controller screens are a rubbish* waste of BOM, especially when Xbox and Strada won't be doing it.

Lies. How else will we get the totally novel DualScreen Vita Foldable PortaPS4/5 with innovative secondary screen that then transforms into a twin VR screen with attachable cardboard box helm.

* My thoughts are in the thread for controller screens. Obviously milage varies, but I really feel it fails to provide the benefits people think it does.
DOAX with benefits
 
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Exactly and I don't think cooling those 8 cores is an issue at all.

A CPU chiplet and a separate GPU makes sense, but two CPU dies with only half activated is a huge waste, very much in opposition what a console chip design is.

I guess if they could use one of those packages fully enabled in a server/cloud instances and get economies of scale that way it could make sense to have that type of design, but even then that's a whole lot of waste in the consumer product.

It makes absolutly no sense , if a Chiplet Version of an Cpu in a upcoming Console has so bad yields and failures something is going wrong here. You can buy actually 16 Core Cpu(Threadtripper) from AMD none of the Cores are deactivated. Or something is wrong with the new 7 nm Process. So i called fake or the nextgen Consoles are an technical desater.

Mod Edit: OffTopic Removed.
 
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...OffTopic Rant...

What exactly has that rant got to do with baseless next-gen rumours, with or without technical merit?

As for PC playing games, sure, but it costs more. So MS can offer a platform that plays games on a cheap console that'll also play on PC. That's a USP no-one else can compete with. that may have no appeal to you, but I'm sure there are plenty of families and households where the idea of having a console where you can buy games, and at zero extra cost also play those games on the PC that's also used for PC exclusives (and at zero extra cost also play your old favourite console games), is very attractive. If it's just you playing games, or you've loads of money, that may not resonate with you, but the large majority of people like getting free stuff.
 
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They already get 'confirmation' from xbox insiders that MS also has RAM on Interposer, aka HBM, via patents.
 
Oh how I would love to see both consoles arriving with HBM just to see all the hat eating of those saying all AMD cards with HBM had to be ultra expensive to make because HBM costs hundreds of dollars to implement and always will.
 
aside from bandwidth are there any other major implications for HBM?
I guess you can pull off more scratch pad type things in a much larger space ie. advantages on modify / simultaneous read/write?
 
aside from bandwidth are there any other major implications for HBM?
I guess you can pull off more scratch pad type things in a much larger space ie. advantages on modify / simultaneous read/write?
It does have more banks in some configurations so there can be more requests in flight. But only 8 channels per device so in terms of read/write contention I think it would be equivalent to a gddr6 solution. If we are talking about two stacks hbm2 versus 256bit gddr6.

HBM2 docs (jesd235b):
8 channels per devices
Up to 48 banks per channel (depends on the stack, 32 banks for 8Hi I think)
Prefetch is 256bit (the request granularity)
= 512 banks for two stacks of 8Hi
= 16 channel r/w concurrency

GDDR6 docs (jesd250b):
2 channels per device
16 banks per channel
Prefetch is also 256bit
= 256 banks for 256 bit wide
= 16 channel r/w concurrency

I think a pair of 4Hi would end up pretty close to identical behaviour?
I might have misread a few things, assume an error by a factor of two anywhere in there.... Not sure about gddr6 banks per channel versus banks per device. Or HBM virtual channels versus physical channels.
 
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With HBM, you should be able to get much better energy efficiency so maybe they can push the SoC to higher clocks.
 
Was going to ask if after a certain bandwidth speed if much more makes a difference.
In the case of AMD most probably, as up till now they have been very bandwidth hungry.
So that crossover point is probably pretty high.

Always thought hbm may be possible for Scarlett as they will be using the boards in cloud also.

Will be a surprise/interesting for me if ps5 does also.
Do we know if ps5 dev kits are ps5 based yet?
Guess it's less about the physical hardware and more about the docs anyway.
 
What are chances we see a streaming focused solution from PS5 with less actual memory but very fast drive and high bandwidth HBM and more but slower UMA solution from MS?

There's a case to be made for less memory if you can stream assets quickly and high extremely high bandwidth. Essentially you'd be trading speed for total memory foot print.
 
SO my thoughts on the paper leaks.....

The design actually makes a bit of sense,
BUT if going for 2 cpu dies v1 I would expect
a) higher clocks, which using 2 dies should allow, eg. base of 3.2 and turbo of 3.8 OR
b) using more core per die, eg. 6/12 cores/threads on each die, thus giving a total of 12/24 core/threads across the console.​
Both options give MS an extra something to boast about relative to what we suspect is a single die 8/16 design for the Sony console.

Also the RCC stuff on a separate die might also makes sense, good use of the IF (infinity fabric) and it might actually be more efficient to separate out the ray casting stuff into it's own logical block on the memory bus.
Again it gives MS the option to boast about having "dedicated RCC chip" vs Sony using an integrated solution, where the RCC stuff just fits in as part of the Vega GPU...?

I dont think the SSD design is a big issue vs whatever Sony has. It will probably all end up pretty similar in functionality in the end.

Based on what we know ( which is all pure speculation of course)
It looks a bit like Sony = Highly integrated solution, Less total silicon, but more densely packed
MS = multiple smaller dies, linked by IF, allowing for flexibility across 2-3 different models. More total silicon, but more buses and connections.

For while there I thought next-gen was going to end up boring boring, with 2 very similar consoles,
but now i have hope that we might actually get 2 very different devices!



 
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