The way they got to theoretical numbers for Arden and Oberon/Ariel is to take their bus width and use 14Gbps chips, which gave them - 448/560GBs of theoretical bandwidth. Using 14Gbpd chips will yield max theoretical bandwidth, but if they are to use higher clocked memory modules (say 16Gbps or even 18Gbps), then that number can go above theoretical (because its theoretical only for 14Gbps in the first place).
But there's no evidence that they have changed to faster memory.