Jon's article is more or less based on David Kanter's performance summary and conclusions.http://arstechnica.com/articles/paedia/cpu/will-barcelona-cure-what-ails-amd.ars
Jon Stoke's vision of AMD seems accurate to me. Especially after reading the Realworldtech article.
Here comes the micro-op/macro-op question into the picture. David is using Intel's terminology all along, so that macro-ops are the x86 instructions, and micro-ops are the low-level RISC ones. In contrast, for AMD, the macro-ops are lower-level ops already, whose hold up to two micro-ops.
So, f.ex. the "µops" on the diarams should be considered as macro-ops in AMD's terms, so two times that many micro-ops. This way you get 3-6 micro-ops, versus 4 on C2D's side. Taking into account there is the micro-op fusion on Intel's part, it's really "up to 5" (two of them fused), according to Agner. This all is true for the retirement phase, too. There are another things to consider here, too: f.ex. that the "6 instructions" below the C2D's predecode is really "up to 6 instructions" (because of the size of the buffer), or that 3 of 4 decoders in C2D are rather simple ones that can emit only one micro-op at a time, and so on. So there are several limiting factors here and there at which Barcelona is just better.
All in all, the RWT article's remark, so that C2D is 33% wider because of the "4 vs. 3 µops" thingy is not really accurate, I think.
And so the conclusion that Barcelona will probably be ahead only in multithreaded server applications, and not in single-threaded, usually desktop applications is IMHO questionable. Okay, David probably counted on the 2.5 GHz number of earlier roadmaps. But more recently slipped roadmaps shows 4-500 MHz higher debuting clocks...
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