ATi's GPU development cycle

thanks for clarifying for me. So would that mean that their is a different design team for R700?
Well, I would speculate that they've had one team working on R600 (delays) and one on R650 (possibly not delayed). So, if they run to form, we'll see R650 three months or less after R600. but R700 will be 6 to 9 months late. :)
 
Well, if you look at R420, R520, and R600, they're all going for new process technologies, and they're getting delayed because of process-related problems or having problems with yields every time. And on R300, it was NV who went with the fancy new process and got screwed by it...
 
Well, if you look at R420, R520, and R600, they're all going for new process technologies, and they're getting delayed because of process-related problems or having problems with yields every time. And on R300, it was NV who went with the fancy new process and got screwed by it...

Failing to learn from other peoples mistakes is second only to failing to learn from your own I think.
 
Well, if you look at R420, R520, and R600, they're all going for new process technologies, and they're getting delayed because of process-related problems or having problems with yields every time. And on R300, it was NV who went with the fancy new process and got screwed by it...

R600 is 80nm, the process ATI should have quite a bit of experience with at this point. Of course if RV6xx do get delayed for manufacturing-related reasons, your point will be further straighted.
 
Well, if you look at R420, R520, and R600, they're all going for new process technologies, and they're getting delayed because of process-related problems or having problems with yields every time. And on R300, it was NV who went with the fancy new process and got screwed by it...

Yea I have noticed that.. a shift as I remember ATI saying they wanted to stick to a process they new when doing the R300... then since then its been delay, delay, delay... :(
 
Well, if you look at R420, R520, and R600, they're all going for new process technologies, and they're getting delayed because of process-related problems or having problems with yields every time.

To paraphrase Steven Levitt: don't confuse correlation with causality. Way too much attention is given to process and, especially, (gasp) yields and too little to the simple fact that the design, verification and validation of a chip is hard. Harder and certainly less forgiving than writing software. If complex software projects are always later than expected, why is it so hard to accept that it's not different for chips?

The fact that new architectures are designed on new processes and are later than initially expected, doesn't mean they are delayed because of the new processes.
Most delays in chip design happen before tape-out. It's extremely common spend 50% more on design and pre-tapeout verification than initially planned, and often longer than that. And after tape-out, a new architecture will necessarily have more bugs than an established one. Longer silicon validation is the result.

R520 was supposedly delayed because of a library cell mistake. That's a simple, stupid design bug. Has nothing to do with a process being new and 'difficult'. I have yet to see any proof that R600 has been delayed because of process issues. And at a time where 65nm silicon is rolling of the production lines, 80nm can hardly be called an new process, can it?

And what do we really know about yields? Because of their extreme business importance, those are often even hidden from chip project leaders, so the chance of this info being leaked to TheInq & friends is low. Most web 'journalists' are entirely clueless when it comes to the process of designing & producing chips, so anytime they utter the word 'yield' take it with a grain of salt. (It's an excellent BS detector! ;) )
Personally, I have seen yield problems with first silicon because of design bugs, but I have never seen a case where schedules were delayed because of it. That's because it's a problem that's immediately obvious when samples return: the effective yield doesn't match the number in your spreadsheet. And most of the time it's easy to pinpoint the problem and solved much earlier than other bugs. (R520 is probably an exception in that the bug impacted yields, but that doesn't mean 90nm defect densities were to blame.)

And on R300, it was NV who went with the fancy new process and got screwed by it...
I agree that the case of NV30 was different. It was widely known in the semiconductor industry and reported in the press, that it was a guinea pig for a radically new process and new CAD tools. In those days, we were also working on our first 130nm chip and everybody was holding their breath to see if they could pull it off.
That was not the case for R520 and definitely not for R600 or R420.
 

Heard from an anonymous source close to ATI, ATI now begins to design R700 graphic chip. Does this mean R650 is simply a 65nm refresh of R600 and ATI canceled R680? Anyway, I bet R700 still a 65nm product and will show up 1 year later from now on.

that's silly.

R700 development no doubt began in early 2006 at the latest. AMD/ATI have to have already begun development of R800 some time ago, and perhaps now, they're doing early work on R900. I'm not saying this to be silly.

both Nvidia and AMD/ATI have more than two GPU development teams each, that work concurrently on new GPU architectures.

Nvidia's G80 / GF 8800 development began in 2002, the same year that the
NV25/GeForce 4 Ti series came out, the year R300/Radeon 9700 came out, and the year that the NV30 / GeForceFX was paper-launched.

in 2004, Dave Orton was interviewed by Beyond3D, he talked about R600, R700 and R800.

the interview is no longer online, but some B3D folks will know this well.

page 3 of that interview:

There will be the temptation for people to look at R420 and NV40 and compare the differences between the two. Clearly NVIDIA have a compelling part in terms of features and the performance – while R420 is unlikely to disappoint much in terms of performance, in comparison it looks a little behind the curve in terms of feature set.

I think the main feature that people are looking at is the 3.0 shader model and I think that’s a valid question. What we felt was that in order to really appeal to the developers who are shipping volume games in ’04 Shader 2.0 would be the volume shader model of use. We do think it will be important down the road.

How much of this comes down to engineering resource? Would it have actually been possible for you to have had a Shader 3.0 part available now if you’d wanted to, at a reasonable performance level?

As you say, there’s always trade-off’s. There’s the trade-off of performance and die size. The answer is yes we could – the die size would have been fairly large to the point where we weren’t sure how produce-able it would be in 130nm and we didn’t think that 90nm was really going to be there for ’04 production. Now, NVIDIA has put something in 130nm that’s die size is 10-15% bigger and there’s still some understanding we have to get on their architecture.

In comparison to NV40 do you think you undershot the expectations for die size this time around, or do you feel that larger die sizes than R420 are not really feasible at this point in time?

We focused on performance, schedule, features and cost. Our trade-off was that we wanted to maintain our performance leadership and hit a die size that we felt could be produced in volume. ATI is very confident that we picked the best path for the enthusiast market in 2004.

With respect to engineering resources its been suggested to us that the “West Coast Team†(Santa Clara - Silicon Valley) has become the main focus for all the PC parts coming from ATI and that now even R500, which we initially understood to be an “East Coast Team†(Marlborough) product, is being designed at Santa Clara. Is it the case that Santa Clara will mainly produce the PC parts now, while Marlborough will be active with “special projects†such at the next X-Box technologies?

We had this concept of the “ping-pong†development between the west and east coast design centres. On paper this looked great, but in practice it didn’t work very well. It doesn’t work well for a variety of reasons, but one of them is the PC architecture, at the graphics level, has targeted innovation and clean sheet innovation and whenever you have separate development teams you are going to, by nature, have a clean sheet development on every generation of product. For one, we can’t afford that and its not clear that it’s the right thing to do for our customers from a stability standpoint. Its also the case that’s there’s no leverage from what the other development team has done, so in some cases you are actually taking a step backwards instead of forwards.

What we are now moving towards is actually a unified design team of both east and west coast, that will develop our next generations of platforms, from R300 to R400 to R500 to R600 to R700, instead of a ping-pong ball between them both. Within that one organisation we need to think about where do we architecturally innovate and where do we not in order to hit the right development cycles to keep the leadership, but it will be one organisation.

If you dissect in, for example, to the R600 product, with is our next, next generation, that development team is all three sites - Orlando, Silicon Valley, Marlborough – but the architectural centre team is in the Valley, as you point out, but all three are part of that organisation.

Would I be correct in suggesting that mainly Marlborough and Orlando would be the R&D centres – with the design of various algorithms for new 3D parts – while the Santa Clara team would be primarily responsible for implementing them in silicon?

No, because the architecture of the R300 and R500 is all coming from the Valley, but we’ve got great architects in all three sites.

Bob Drebin in the Valley is in charge of the architecture team and so he’s in charge of the development of all the subsequent architectures but he goes out to the other teams key leaders and that forms the basis of the unified architectural team. At an implementation level, you’re right – Marlborough is mainly focused on the “special projects†and that will probably be another 18 to 24 months for them. So the R600 family will mainly be centred primarily in the Valley and Orlando with a little bit from Marlborough, and then the R800 would be more unified.
 
Warning: minimal understanding ahead!

Well, if you look at R420, R520, and R600, they're all going for new process technologies, and they're getting delayed because of process-related problems or having problems with yields every time. And on R300, it was NV who went with the fancy new process and got screwed by it...
I was struck by this, too. Maybe our more learned members can exorcise me of my demon theories:

1) ATI/AMD and NV seem to have settled on aiming new architectures on alternating nodes. Is this b/c both seem to be primarily based on TMSC, and TMSC is only able to provide substantial assistance to one IHV at a time? Or is it just down to different engineering decisions at each company?

2) Am I right in thinking there are major and minor process nodes, with the minors essentially optical shrinks of the immediately preceding majors (e.g., 130nm major, 110nm minor) and the majors being more complicated transitions? If so, is NV setting themselves up for quicker/cheaper refreshes and ATI/AMD for more involved ones? By the same token, is developing on minor nodes less fraught with manufacturing pitfalls b/c the process is better understood by then? Or am I mistakenly magnifying the differences b/w process nodes?

Or does ATI/AMD and NV having multiple simultaneous design teams (not to mention silent_guy's last post) explode my theory of NV having a process advantage? Correlation/causation and all. It's certainly possible that NV's just been on a roll (wouldn't be the first time).
 
I think it's much simpler, nV managed to make a more efficiant design die size/features-wise, while ATI pushed for more features which _demanded_ smaller process to be doable/viable. It's just a matter od decisions, ATI went for "we can do more and better" and it bounced back. I'm surprised that they didn't learn from their mistakes with R520/580 (useless investments in dynamic branching and the ring-bus which were good on paper but totally unimportant at that point in time). I wonder what will it be this time, though the 512-bit bus comes to mind since I still can't see any viable reason for that, not even in the forseeable future (lifetime of the chip generation). By the time we'll _need_ that bandwidth, the chip will be obsolete anyway I think (again, think R520 and dynamic branching as an example - it's just now that it becomes important but I doubt anyone would go out and buy an X1800XT for that purpose).

Bad management decisions thanks to the false estimation of market requirements at a certain point in time, that's what it comes down to.
 
Yeah, I can understand poor management decisions, but both Xenos and R520 would seem to set ATI up to having a head start on a DX10 unified part, no? And they were late on that, too. So I'm left to wonder if that's also still mainly management's fault, or if their engineers aren't (how to say this without being too offensive, especially since I'm just cluelessly speculating?) as productive as NV's.

It's just confusing, given how good R300 was, and the problems since (starting with R420, which was a relatively minor upgrade--ATI's words--yet launched after NV40, a far more extensive redesign that took less time to come to market).

I mean, G80's super-highly-clocked ALUs seem like a win from every perspective, but ATI doesn't have it and R600's still arriving later. Is it just the case that NV's brain trust had the idea and ATI's didn't? Or that NV felt more confident it could achieve it? Witness R520, which apparently some in ATI thought should have been unified. That would've turned their apparently premature branching excellence into more of a desirable feature (especially given Xenos as an SM3-ish development platform) and mooted their lack of VTF in their vertex shaders, no?

But maybe I'm overthinking this (without anywhere near a sophisticated understanding of GPU development). If only I had R600 framerate charts and screenshots to distract me. ;) Thanks for the reply, _xxx_.
 
It's just confusing, given how good R300 was, and the problems since (starting with R420, which was a relatively minor upgrade--ATI's words--yet launched after NV40, a far more extensive redesign that took less time to come to market).
Simplistic a view as it may seem, this one ( R420 vs NV40 ) I'm inclined to chalk up to ATi completely underestimating nV and just deciding they could bag this round too with just a speed bump and tweaking a little on the architecture. So, IMO that was an issue of lazyness rather than incompetence.
 
Well, when I talked with some nVidia guys who used to work at ATI last year, they really liked it at nVidia better. Their primary comment was that the company culture is entirely different, that nVidia is far more consumer-centered, while ATI is far more engineering-centered. It seems that this alone could explain why ATI is failing to keep up.
 
nVidia is far more consumer-centered, while ATI is far more engineering-centered

That certainly echoes the persona these companies portray.
 
Well, when I talked with some nVidia guys who used to work at ATI last year, they really liked it at nVidia better. Their primary comment was that the company culture is entirely different, that nVidia is far more consumer-centered, while ATI is far more engineering-centered. It seems that this alone could explain why ATI is failing to keep up.
Every company thinks they are customer centric and I honestly have no idea what it means. Marketing centric? Maybe NV has this reputation because they have good devrel and their products have recently made good tradeoffs for current apps. Obviously despite what marketers say we have no idea if they've made the correct tradeoffs for future apps. Or maybe every company really is customer centric and some are just better at it than others.

Also, I'd hope that 2 former ATI guys at Nvidia like Nvidia better. Otherwise they'd have returned to ATI or gone elsewhere.
 
I think it's much simpler, nV managed to make a more efficiant design die size/features-wise, while ATI pushed for more features which _demanded_ smaller process to be doable/viable. It's just a matter od decisions, ATI went for "we can do more and better" and it bounced back. I'm surprised that they didn't learn from their mistakes with R520/580 (useless investments in dynamic branching and the ring-bus which were good on paper but totally unimportant at that point in time). I wonder what will it be this time, though the 512-bit bus comes to mind since I still can't see any viable reason for that, not even in the forseeable future (lifetime of the chip generation). By the time we'll _need_ that bandwidth, the chip will be obsolete anyway I think (again, think R520 and dynamic branching as an example - it's just now that it becomes important but I doubt anyone would go out and buy an X1800XT for that purpose).

Bad management decisions thanks to the false estimation of market requirements at a certain point in time, that's what it comes down to.

If you continue on that perspective you'll end up in a dead end. NV4x/G7x's PS db abilities were underwhelming at best, so how do you expect a competing SM3.0 GPU that arrives 1.5 year later than the NV40 to make any major impact with PS db in such short notice?

You guys have to factor in that every great feature or capability of GPU A or B need a far wider adoption then from just one major IHV to kick off. Developers won't that easily take advantage of it if it isn't supported on a competing sollution or the implementation just plain and simple sucks.

Buswidth is just one of those things; I'd say that given what each of the two IHVs had in their hands from prior architectures for one side a 384bit bus and for the other a 512bit bus made eventually more sense and probably was easier to implement. I don't think there'll that much to available to torture a 512bit bus with just 8xMSAA (and 16 ROPs) available for the R600's lifetime, but then again they really don't need to bother with wider buswidths (like NV eventually will) for future GPUs either.

All in all G8x looks to me more flexible in the ROP partition department (think of the 5 partitions / 320bits of the GTS) and R6x0/RV6x0 more flexible in the SP scaling department, if the 24*5D ALUs for RV630 are accurate.

Finally IMO NV started after the NV30 flop a "minimize risks/maximize margins" strategy and it seems to continue up to today and with good results. Cliff note: they've learned from a past huge mistake and play safe. There are a lot of possibilities/perspectives one could think of with ATI, but at the end of the day their strategy doesn't show ME personally they've changed much in the recent past. Walking constantly on a tight rope is dangerous; there if you're willing to take a risk it most certainly has its cost.
 
Also, I'd hope that 2 former ATI guys at Nvidia like Nvidia better. Otherwise they'd have returned to ATI or gone elsewhere.
Not necessarily. Sometimes you just take what you can get, and job security can mean more than enjoyment. But from what I saw there, the atmosphere was really great.
 
Every company thinks they are customer centric and I honestly have no idea what it means. Marketing centric? Maybe NV has this reputation because they have good devrel and their products have recently made good tradeoffs for current apps. Obviously despite what marketers say we have no idea if they've made the correct tradeoffs for future apps. Or maybe every company really is customer centric and some are just better at it than others.

Also, I'd hope that 2 former ATI guys at Nvidia like Nvidia better. Otherwise they'd have returned to ATI or gone elsewhere.

I'd assume what they mean is:
Consumer centric: Developing only for the immediate benefit for the consumer

Engineering centric: Building something more for the sake of the achievement, ie, we added great dynamic branching support even though it has no use in current games OR we fully support all the features of the new DX at high speed even if no games use them OR we support full IEEE double precision ints, even though it's not necessary for games and added a substantial amount of logic to achieve

Honestly, it looks like nvidia has successfully combined the design philosophies of both past nvidia and 3dfx.
3dfx - maximum performance and image quality in current/past games
nvidia - good speed for this year's games with token support for next year's features

I don't know what happened with ati, they've always kind of been like they are now I suppose, with the sole exception of r300 and perhaps the derivative r420. And those two were more of a result of the acquisition of ArtX, so it appears ati has successfully acclimated artx to ati's design philosophies. Prior to r300, Ati also was always "go big, arrive late."
 
Well, let's take R420 out of the list for two reasons. One, because the difference in launch date vs GF6 is not large enuf to be material. Two, because it's pretty clear they made a marketing choice to go second. The intent was to force NV's clocks hand and then top it. This actually resulted in all kinds of tomfoolery, with both IHV's raising clocks *after* reviewers had received boards. So R420 was not "late" in any tangible engineering way.

R520 is actually worse than it looks. Why? Because of SLI, NV went 15 months from GF6 launch to GF7 "refresh". So that's the context where R520 was several months later than GF7; tho ATI would, no doubt, also want to point at X850 and request some credit there.

Having said all of that, the delays of the last two generations mean that intentionally or not, AMD/ATI has found themselves in a similar situation to the sneer NV aimed at them around the time of the R8500 launch, when a green marketing type noted, "Their problem is they're always aiming to beat our last product instead of our next one." (OWTTE)
 
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