Anti-aliasing Without EDRAM in NVidia's PS3 GPU...
- Thread starter Jawed
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Jawed
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As it happens I respect the idea that TBDR and this patent go together. But my respect is founded on no understanding, 
From having spent a fair amount of time on the ATI patents related to R500, it seems to me it has the chance to be extremely efficient at frame buffer operations, blending, AA, Z/stencil because the whole design is a pipeline - random reads/writes against the frame buffer seem to be banished.
A brief glance at the patent, particularly the box labelled "Latency Buffer", implies to me that NVidia is also pipelining the blending/AA, so is tackling the problem head-on like ATI.
If anyone is prepared to give a précis of the NVidia patent, then feel free
Jawed
From having spent a fair amount of time on the ATI patents related to R500, it seems to me it has the chance to be extremely efficient at frame buffer operations, blending, AA, Z/stencil because the whole design is a pipeline - random reads/writes against the frame buffer seem to be banished.
A brief glance at the patent, particularly the box labelled "Latency Buffer", implies to me that NVidia is also pipelining the blending/AA, so is tackling the problem head-on like ATI.
If anyone is prepared to give a précis of the NVidia patent, then feel free
Jawed
If so, does this leave out some rendering effects that would work on a non-linear reading of the buffer?Jawed said:
Jawed
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Shifty Geezer said:
I don't see why but I'm not sure what effects you're referring to, and whether you're referring to effects based-upon textures rather than the frame buffer.
But I'm still guessing, all my comments are based on a cobbled-together understanding of the patents!
Jawed
Jawed said:As it happens I respect the idea that TBDR and this patent go together. But my respect is founded on no understanding,
...
Hehe...times like this I have to resort to pretty pictures, without having to read the whole patent!
Looking at the PowerVR section for comparison's sake for TBDR and referring to the patents from the first page,
The first scanout filtering patent reduces the 'frame buffer' bandwidth further when decompressing/downsampling/blend and draw...
The second colour compression patent reduces the internal GPU bandwidth with compression for SSAA/MSAA fragment tile shading which also further reduces the 'framebuffer' bandwidth...
Of course, these bandwidth saving features are in addition to what you get with TBDR...
And this wouldn't be complete without the golden oldie graphs circa 2000!
http://www.eurogamer.net/article.php?article_id=488
Why would a TBDR even have an over-sampled back-buffer in main memory? It seems to me that a TBDR would downsample completed tiles before writing them to memory, meaning that the TBDR would have one or more front buffers but no back-buffer in main memory - saving space and bandwidth.
If I understand things correctly, an IMR has one or more oversampled back-buffers as well as a front-buffer in main memory. Scan-out involves memory bandwidth for reading the entire front buffer, down-sampling involves memory bandwidth for reading the entire oversampled back-buffer and writing the entire front-buffer. The method described in the patent goes directly from over-sampled back-buffer to scan-out, saving the space as well as the read/write bandwidth for the front-buffer. AFAICS this has nothing to do with TBDR...
If I understand things correctly, an IMR has one or more oversampled back-buffers as well as a front-buffer in main memory. Scan-out involves memory bandwidth for reading the entire front buffer, down-sampling involves memory bandwidth for reading the entire oversampled back-buffer and writing the entire front-buffer. The method described in the patent goes directly from over-sampled back-buffer to scan-out, saving the space as well as the read/write bandwidth for the front-buffer. AFAICS this has nothing to do with TBDR...
Because of the ISVs.trinibwoy said:
I dont think NVIDIA would have a tiler in the works, or Sony going for it ... but I think it would be a lot better than ending up with direct rendering without eDRAM. I think Sony is making a huge mistake, they are squandering what Cell gives them with a graphics architecture which in a console environment compares poorly with the competition.
This isnt the same situation as with the poorly conceived GS. ATI's eDRAM chip is unlikely to be lacking features ...
API, developer inertia, compatibility. On the PC the direct mode renderers are what the APIs and software is designed for, when your competition sets the terms you can compete on things are not always easy.
Although the complete inability of the designers of tilers to execute, because they have all been IP only companies, hasnt helped. It isnt a good model for this market ... fine for SOCs, but not for PC graphic chips.
Although the complete inability of the designers of tilers to execute, because they have all been IP only companies, hasnt helped. It isnt a good model for this market ... fine for SOCs, but not for PC graphic chips.
My guess is PS3 GPU has it's own XDR RAM controller and 128~256MB dedicated RAM (frame-buffer and textures). The pluses I can see are lower worst case fb latency (eDRAM overflow probably isn't so pretty, but developers can render in tiles to avoid this), and more predictable/lower texturing latency. That could be significant for dependent texture reads...