32 GByte/sec with 128 Bit DDR?

http://www.siliconstrategies.com/story/OEG20020325S0065

According to the roadmap from the JEDEC organization, DDR-II memories for the PC and other markets will eventually come in 400-, 533-, and 667-MHz speed grades, Sato said during a presentation at the JEDEX conference. JEDEX is sponsored by the JEDEC Solid State Technology Association. (JEDEC was once known as the Joint Electron Device Engineering Council.)

For the high-speed graphics market, DDR-II memories will be offered in two speed grades: 800- and 1,000-MHz, Sato said. DDR-II memories will come in 200-, 220- and 240-pin FBGA packages, he said.

I continue to be impressed at the improvements in ram speed in recent and near-future years. According to the article, DDR-II is suppossed to go "mainstream" by 2004, but I don't know if that includes production of the high-speed graphics parts by that time as well.

If 800 or 1000 Mhz is available by 2004, that's a pretty impressive increase, IMO. It wasn't too long ago that the general "feeling" in the graphics market was that "traditional" memory bandwidth had no hope of scaling in any way close to "moore's law." Looks like we may have a case where, "if there's a demand for it, it will be built" situation here.

It makes you wonder about the viability of e-dram in the PC market....
 
Joe De Furia: at first, eDRAM has it's good and bad sides, but here is ppl with better knowledge to talk about them so I'll leave that for them.

and Joe De Furia: I hope that this time company that I am following actively right now don't get in bad troubles. (in 3 cases of 4 that has happened, so maybe I and my ideas are cursed.) Because if everything goes well, we will see something really new before summer ends. ( I actually hope that things would clear up before E3, but better leave some room for delays. :rolleyes: )
 
Please, call me Joe. ;)

Sure, edram has it's pros and cons, and I'm certainly no expert on the subject. However, with everything I know about edram so far, is that the "cons" (mostly, being able to combine lots of edram on the same die as lots of logic gates), look to be a lot more troublesome than the biggest "pro"...increased bandwidth. The pro is relative, of course. If we can get 256 MB of 30+ GB/sec bandwdith "external" ram in a couple years....that's tough to compete with.

Especially when the "big boys" (ATI and nVidia) don't have to do any "special" design to take advantage of new Ram types....it's the same that they've always been working with, just faster. Makes for relatively inexpensive and less risky development of new graphics cores.

I haven't seen any edram "roadmaps" lately...do you know the "expected" performance and density of edram on say, a 0.09 micron process?

And gasp...what if 256 bit busses become the norm for high-end gamer cards over the next two years? 60+ GB/sec of raw bandwidth without the need to introduce any "exotic" memory?!

(in 3 cases of 4 that has happened, so maybe I and my ideas are cursed.)

Heh...which is the one case that it hasn't happened. ;) Anyway, I do hope we see something really new this summer. I'm beginning to get bummed out that with the rumored DX9 delays, we are going to have to wait until next spring... :(
 
eDRAM will definatly play a big part in graphic chips, but it will be a while before everything can be done in eDRAM. Thats were technologies like DDR2 come into play.

Infact, if you think about it... as time goes by chips that utilize eDRAM will become the better solution even cost-wise...
 
Joe: well, the company I am now following, isn't going to wait for DX9. they will have some DX9 features but it is based on DX8.1 core and they aren't going to go eDRAM nor TBR route, so there isn't much choices left. ;) And it looks like they have already at least partially working HW.

I am not sure about eDRAM clock speeds on 0.09µm, at least smaller tech should give even higher internal bus width and well, the Glaze3D should have been able to reach 200Mhz on Infineons 0.20µm, but afaik on 175Mhz it already overheated heavily.
 
Nappe1,

Yeah...let's hope Matrox can get something out the door this summer. ;)

Livecoma,

Interesting point...I could definitely see e-dram evolving to become the value solution of choice, rather than the ultimate performance choice. (Of course, there's also nothing stopping anyone from utilizing both e-dram in combination with high-speed external memory....) I know bit-boys was touting that they had some scheme to utilize "all" the bandwidth available, basically combining the edram bandwidth with the external bandwidth in an additive fashion. (Perhaps having complete frame buffer or perhaps just z buffer in e-dram, and the rest in external memory...)
 
Big mistake Joe !!!
They were not talking about the chips' frequency but about its "DDR equivalent".
DDR2 chips for main memory will begin at 200Mhz (400Mbit/s per pin), then will move 266Mhz (533Mbit/s per pin) and in the article they wrote 400 and 533Mhz.
Instead of 800Mhz and 1000Mhz, you should have read 400Mhz and 500Mhz.

So will we have "only" 16Gbytes/s in 2004 ? I hope we won't ...

regards,

Guillaume
 
Lessard: I was thinking about to get 19.2GB/s before autumn. ;)

so, others must rethink their memory busses or watch from a side while someone eats their market.

did someone say high cost?
of course it will be high cost but almost 20GB/s will sell even with a huge price tag. ;)
 
Lessard said:
Big mistake Joe !!!

So will we have "only" 16Gbytes/s in 2004 ? I hope we won't ...

I doubt that: 350MHz (700 DDR) Ram is availible right now, and I would not be suprised if we'll see 400 MHz chips by the end of the year. With 12.8GB/s at the end of 2002 from DDR I, 16GB/s in 2004 with DDR II sounds rather modest.
 
Joe DeFuria said:
Please, call me Joe. ;)

Sure, edram has it's pros and cons, and I'm certainly no expert on the subject. However, with everything I know about edram so far, is that the "cons" (mostly, being able to combine lots of edram on the same die as lots of logic gates), look to be a lot more troublesome than the biggest "pro"...increased bandwidth. The pro is relative, of course. If we can get 256 MB of 30+ GB/sec bandwdith "external" ram in a couple years....that's tough to compete with.

Joe, I'd say the biggest problem with embedded DRAM is that commodity DRAM packages are soooo cheap. AFAICS it'd be hard to justify putting a handful of megabytes on chip when you can buy a bucket load of external memory for (probably) about the same price.

Of course the extra bandwidth is nice, but small SRAM caches (==same technology as most ASICs) can be effective in boosting your "equivalent" bandwdith.

All IMHO of course.
 
Simon F said:
Joe DeFuria said:
Please, call me Joe. ;)

Sure, edram has it's pros and cons, and I'm certainly no expert on the subject. However, with everything I know about edram so far, is that the "cons" (mostly, being able to combine lots of edram on the same die as lots of logic gates), look to be a lot more troublesome than the biggest "pro"...increased bandwidth. The pro is relative, of course. If we can get 256 MB of 30+ GB/sec bandwdith "external" ram in a couple years....that's tough to compete with.

Joe, I'd say the biggest problem with embedded DRAM is that commodity DRAM packages are soooo cheap. AFAICS it'd be hard to justify putting a handful of megabytes on chip when you can buy a bucket load of external memory for (probably) about the same price.

Of course the extra bandwidth is nice, but small SRAM caches (==same technology as most ASICs) can be effective in boosting your "equivalent" bandwdith.

All IMHO of course.

not a bad "in your humble opinion". I have interesting few quotes conserning this from last late November (or early december), but so far I don't have permission to release them so source will be anonymous.
 
What about a dual assymetric 128bits channel memory access? It could be very fast and cheap.

What about:
- 32MB 128bits 200MHz DDR (6.4GB/s) for framebuffer
- 64MB 128bits 250MHz DDR (8GB/s) for texture and vertex
- support for 8 level multitexturing with high 64bits internal precision.

With this framebuffer using sthocastic multisampling FSAA and 1024x768x32 could be great for most games.

This could be really fast and relativally cheap.
 
It would be maybe a bit cheaper than a full bandwith solution but it would be also much more inefficient assigning a <a priori> bandwith to frame buffer and textures. U'd end to waste a lot of bandwith.

ciao,
Marco
 
Joe, I'd say the biggest problem with embedded DRAM is that commodity DRAM packages are soooo cheap. AFAICS it'd be hard to justify putting a handful of megabytes on chip when you can buy a bucket load of external memory for (probably) about the same price.

Simon,
Yes, that's pretty much my feeling as well. It seems to me that embedded DRAM architectures will have a tough time competing (relatively) with large quantities / bucket-loads of external DRAM. This is of course assuming that there is not a hugely dramatic increase in effective and usable bandwidth in an embedded DRAM system.

I'm not convinced that embedded DRAM technology advancement is keeping pace with "external ram" advancement. To me, someone someone needs to produce a chip with about 24 MB embedded DRAM, with an internal bandwidth of close to 20 GB/sec by the end of 2003. Of course, on the same die, they also deliving the logic (features) capable of competing with the latest and greatest at that time. I may be pessimistic, but I just don't see it happening.
 
nAo,

The idea is improve the performance without much cost impact.
For example

Design1:
- 32MB 166MHz DDR 128bits (5.3GB/s) for framebuffer.
- 64MB 250MHz DDR 128bits (8GB/s) for textures and vertex.

Design2:
- 128MB 300MHz DDR 128bits (9.6GB/s) UMA.

Probably the Design1 will be cheapper and faster than the Design2.

Each memory access channel will have more eficiency with page hit (Principle of Locality) and less latency average.
 
pascal said:
nAo,
Probably the Design1 will be cheapper and faster than the Design2.
IMHO, you're wrong. Design1 will be more expensive than Design2 (128+128 bit buses vs 128 bit bus) and in some circumstances even slower, cause u've a fixed amount of bandwith devoted to frame buffer and textures. What happens in future games ala Doom3 where the hw draws tons of untextured polygons? (stencil..) U'd end with 8 giga/s devoted to textures, completely wasted
A design with a 256 bit bus and a fast memory (800 mhz) coupled with multiple memory controllers would be a bit more expensive than Design1 (but it depende on memory prices) but much more effective.

Each memory access channel will have more eficiency with page hit (Principle of Locality) and less latency average.
That's what multiple controllers, crossbar architecture, and on GPU caches are for.

ciao,
Marco
 
Tons of untextured polygons? Are you talking about the multiple passes per pixel needed by some old hardware ?

Suppose a hardware capable of multisampling FSAA and 8 level multitexturing in an single pass.

edited: AFAIK the major problem Doom3 has is the texture bandwith. JC had to use compressed texture and disable anisotropic with GF3.

All this crossbar talk will not improve the real memory latency and page hit, memory controllers and cache both architectures have :rolleyes:

Also many problems designers have today is the high frequency used by memory, right? And it will get worse.

edited: suppose we have an improved GF4 core (8 level multitexturing in an single pass) and at lower frequency (200MHz core) my guess the design1 could be done today and very cheap with great performance almost all situations.
 
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