Framing memories... ;)

[Nappe1]

While I moved to bigger and nicer flat as well as I am soon changing my employer, I realized that It has become time to frame some memories from the past...

It was a bit suprising that my girlfriend (she is moving in to same flat with in 6 months.) did not think it being weird to have some chips framed on the wall.

 

[tabs]

They almost look like shiny awards, so that could be it.. or you just have a really cool g/f.

 

[CarstenS]

They really look like they deserve a place on every geeks' wall - not matter what the gf/wife says.

 

[Ninjaprime]

Those chips look huge, I suppose thats all the eDRAM? Anything you can say about them spec-wise? I always wondered what Bitboys were working on, I got little tidbits here and there that sounded exciting, but never anything substantial.

 

[Arun]

Hehe, nice!

Those chips look huge, I suppose thats all the eDRAM?

Those were made in the pre-flipchip era so you really can't know the die size from the packaging alone. I doubt these were small chips though - at least for their time. It's easy to forget how much GPU die sizes have increased over the last 10 years!

 

[Nappe1]

Hehe, nice!
Those were made in the pre-flipchip era so you really can't know the die size from the packaging alone. I doubt these were small chips though - at least for their time. It's easy to forget how much GPU die sizes have increased over the last 10 years!

quick measurement gave same results as I recalled, 20 x 20 mm for the die alone (you can see it on certain angle from top and easily from the bottom side) and ~45 x 45 mm for the whole package. 12MB eDRAM, "around 64 million transistors", DX8.1 (PS 1.3, VS 1.1)

I seem to recal that planned release was in late autumn 2001. Top chip, rev A, came from fab in late summer 2001 and as there is such thing as rev B (the lower chip), it was not working as expected. When the rev B chip was in fab, the infineon pulled the plug from whole eDRAM manufacturing and only prototype batch was made.

These are known as "AXE", which was internal name. if it would have materialized as products it would have been most likely called as "Avalanche 3D" and "Avalanche Dual". It's precessor was ill-fameous Glaze3D (Remember it's optional geometry processor was called as "Thor" ) and it successor, which was killed in very early stage due focus shift to mobile graphics, was called internally "Hammer".

It took 6 years from me to make the decision what to exactly to do with these, but now they do seem to gather a lot of interest even from non-geek friends and relatives visiting.

 

[Arun]

quick measurement gave same results as I recalled, 20 x 20 mm for the die alone (you can see it on certain angle from top and easily from the bottom side) and ~45 x 45 mm for the whole package. 12MB eDRAM, "around 64 million transistors", DX8.1 (PS 1.3, VS 1.1)

Sorry I missed your post but that seems exceedingly unlikely. Do you know if this AXE die shot is accurate? http://www.firingsquad.com/media/article_image.asp/1128/01

I tried figuring out how to size that and I stumbled upon Infineon's 0.17um press release. I'm honestly impressed by that eDRAM process - they claimed their eDRAM cell size was only 0.23um2! That is incredibly small for a 0.17um CMOS process - for comparison sake's, it's barely bigger than the NEC 90nm eDRAM originally used by the XBox360's Xenos (0.22um2) and it's smaller than TSMC's 40nm [strike]eDRAM[/strike] SRAM (~0.25um2) - if I had access to an eDRAM process that good I'd want to make an eDRAM-based GPU too! (well, there's the tiny problem Infineon cancelled the process mind you, heh)

Using an effective cell size of 0.30um2 (there's always plenty of overhead in a real memory macro) and trying to include as little of the nearby logic as possible, I get to a die size of about 150mm² (12x12 rather than 20x20). It might be a bit higher (higher overhead) but it still seems a LOT more reasonable in the 2001 timeframe! A bit of further Googling tells me Bitboys revealed the Glaze3D die size was expected to be 130mm² in their original presentation so that about checks out. As I said, 'monster chips' only came much later in the history of Consumer 3D Graphics I wonder if this also explains why Hammer would have had only 3MB of eDRAM versus 12MB for AXE - there simply wasn't as good an eDRAM partner available afterwards. And with so little it honestly looked like a gimmick - unlike Glaze3D/AXE where it could have been very interesting.

 

[Gipsel]

I tried figuring out how to size that and I stumbled upon Infineon's 0.17um press release. I'm honestly impressed by that eDRAM process - they claimed their eDRAM cell size was only 0.23um2! That is incredibly small for a 0.17um CMOS process - for comparison sake's, it's barely bigger than the NEC 90nm eDRAM originally used by the XBox360's Xenos (0.22um2) and it's smaller than TSMC's 40nm eDRAM (~0.25um2)

Are you sure you didn't pick TSMC's SRAM cell size (0.242 µm² for the high density version)?

 

[Arun]

Are you sure you didn't pick TSMC's SRAM cell size (0.242 µm² for the high density version)?

Gah yes, I obviously meant SRAM, sorry about that typo/brainfart and thanks for the correction. Also this presentation on Glaze3D also claims a 1Mb block size of 0.38mm² which is roughly in line with what you'd expect from TSMC 40nm SRAM (perhaps slightly larger compared to an area optimised implementation though). I'm not sure what other metric you had in mind?

Anyway these are certainly very impressive numbers - too bad it's completely impossible for eDRAM to have such massive gains versus SRAM on the same process in this day and age. I'll be curious to see what the Wii U does with it but I don't expect miracles.