World's fastest transistor operates at 604 GHz

The world's fastest transistor has been developed by a pair of US researchers, possibly paving the way for a new generation of super-charged electronic chips.

Milton Feng and Walid Hafez at the University of Illinois at Urbana-Champaign, developed the record-breaking transistor by carefully blending different semiconducting materials within individual layers of the microscopic device.

Transistors are basic components within electronic circuits. They are used as tiny electronic switches or current amplifiers or for a variety of other tasks. Modern computer chips - like Intel's Pentium 4 - contain millions of individual transistors and the fundamental efficiency of these chips depends on the speed at which their transistors operate.

Feng and Hafez developed a transistor less than half a millionth of a metre long, with a maximum operating speed of 604 GHz, meaning it can carry out 604 billion operations every second.

"This establishes a new benchmark for transistor performance," says Doug Barlage at North Carolina State University, US. "It is probably three times faster than the fastest silicon-based device."

Sandwiched layers

Feng and Hafez developed a particular type of component known as a bipolar junction transistor, which consists of three material layers, laid on top of one another.

The current is controlled by the way it passes through three layers - the base, emitter and collector layers. Varying the current which passes through the base to the emitter can control the flow of the current between the emitter and collector. This can amplify the current at that terminal or be used to switch the current on or off.

To make their transistor layers, the researchers carefully blended together two different crystalline semiconducting materials: indium phosphide and indium gallium arsenide. Critically, they controlled the blend found in the "collector" layer to affect its crystalline structure in a way which made it easier for electrons to pass through - this was a crucial step in making the transistor so efficient.

Read More: NewScientist
 
Call me back when they can fit more than 1 in a chip without half the northern hemisphere exploding.
Though i guess one would need much lower trasnistor counts with trannies this fast.
 
Pretty cool, but unfortunately, the BJT transistor sucks the big one when it comes to making (largish)digital IC. This is more for analog RF-circuits and the like.

But at least it trounced the diamond substrate transistor last autumn, which I think achieved 81GHz.
 
Just had a crazy idea of a device composed of 300,000,000 tubes instead of trannies. Of course, it would have much lower frequency since tubes are slower switching than trannies. That would probably need a few gigawatts for heating only...
 
But valves* sound sooo much better! Real ear candy!

* the real name for tubes......

:cry: I miss me Golden Lion KT88's.......(actually, I've got 4 quads put away!)
 
I think the largest problems nowadays are not speed, but buffering and leakage.
 
DiGuru said:
I think the largest problems nowadays are not speed, but buffering and leakage.

Hence the insane heat output of the modern day chips? Isnt SOI supposed to be helping a bit with that? Also wouldnt moving to 65 nm be a bad idea then if they cant even fix all the leakage occuring @ 90 nm? Hmm...wouldnt getting rid off leakage result in higher clocked and more efficient processors?!
 
suryad said:
DiGuru said:
I think the largest problems nowadays are not speed, but buffering and leakage.

Hence the insane heat output of the modern day chips? Isnt SOI supposed to be helping a bit with that? Also wouldnt moving to 65 nm be a bad idea then if they cant even fix all the leakage occuring @ 90 nm? Hmm...wouldnt getting rid off leakage result in higher clocked and more efficient processors?!

Yes.

Bipolar transistors are blindingly fast, but analog. We want a digital device with exact, dependable outputs. CMOS. But they use condensators to hold the transistor state, which requires time to charge/discharge and buffering for storage. But even so, semiconductors depend on impurities to differentiate the material between isolator, P-channel and N-channel. So the material itself is mildly conductive in the base state.

Add to that, that quantum well tunneling becomes a larger problem all the time while the structures shrink. At a certain size, you've got a certain probability that an electron will just pass right through an isolation layer, which might change the properties of the material a bit to a more conducting state while doing so and increasing the probability for other electrons to follow.

If we could make semiconductors to real absolute specs, that could all be taken into account, but we can't. So, anything that even alters the expected 3D layout a miniscule bit greatly exaggerates the problems.

It is expected, that at 65 nm more than half the energy consumption is leakage. Which is really bad for the stability of the signals on the chip as well, and increases the need to stabilize the signals by buffering them better greatly.
 
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