Will Future CPUs have On-Die Coprocessors and Would Those Have Any Impact on Graphics
- Thread starter Farid
- Start date
The fourth iten could happens with a full integration of CPU/GPU. It is more than a UMA (Unified Memory Architecture), I call it UMH (Unified Memory Hierarchy).
What kind of software model could be used for a fully integrated CPU/GPU? Perhaps it would be similar to an API now but instead of sending command packets to a GPU it would just compile GPU "instructions" (shaders) right into the main program instruction stream? Seems a little weird
I could imagine instructions for shaders + fixed function stages and having a graphic thread control the 3D pipeline alongside other threads, including the main CPU thread/program.It's a (reasonably) small step going from on-board to on-chip, but coming up with a completely new architecture that does it all is a very steep hurdle. After all, you want to be able to program all that without having to write your own OS.
So, unless you use the PC architecture as we know it, or make it all transparent by offering the same API through the driver, it will only work for consoles and other closed platforms.
So, unless you use the PC architecture as we know it, or make it all transparent by offering the same API through the driver, it will only work for consoles and other closed platforms.
So you have the solution. Make it all transparent by offering the same API (OpenGL, D3D) through the driver as a way to easy the transition. And at the same time offer a set of new tools/API.
When intel step back to improved P6 like architecture it was a sign of the big wall. The wall of diminished returns where more transistors doesnt translate in proportional or economically atractive performance increase in general linear (monothread) applications. Look down the road and see that by ~2012 we will be using 22nm process, which means 10 times more transistors than 65nm process. What to do with so many transistors? A chip with 20 P6 cores and 40MB cache? Probably programmers in general will dont know how to use it.
What to do with all this silicon real state available? Integrate other functions.
Eventually it may start using the old architecture, just make it more integrated.
But there is a place to be conquered, the living room. In fact the entire house with a kind of automation (embedded, appliance or console style) combined with flexibility (PC style).
I call it a PC/Console Hybrid (some old-timers will remenber that).
Also there is eficiency to be gained with applications using a parallel processor. Imagine:
- an office automation multithreaded with the use of a visual API.
- an audio application capable to substitute a US$5,000.00 audio processor.
- visual processor for HD image.
IMHO the convergence will hapen soon or later.
Sorry, but will continue this later, my daughter is calling me and had to finish my work.
Maybe a new thread...
When intel step back to improved P6 like architecture it was a sign of the big wall. The wall of diminished returns where more transistors doesnt translate in proportional or economically atractive performance increase in general linear (monothread) applications. Look down the road and see that by ~2012 we will be using 22nm process, which means 10 times more transistors than 65nm process. What to do with so many transistors? A chip with 20 P6 cores and 40MB cache? Probably programmers in general will dont know how to use it.
What to do with all this silicon real state available? Integrate other functions.
Eventually it may start using the old architecture, just make it more integrated.
But there is a place to be conquered, the living room. In fact the entire house with a kind of automation (embedded, appliance or console style) combined with flexibility (PC style).
I call it a PC/Console Hybrid (some old-timers will remenber that).
Also there is eficiency to be gained with applications using a parallel processor. Imagine:
- an office automation multithreaded with the use of a visual API.
- an audio application capable to substitute a US$5,000.00 audio processor.
- visual processor for HD image.
IMHO the convergence will hapen soon or later.
Sorry, but will continue this later, my daughter is calling me and had to finish my work.
Maybe a new thread...
Blazkowicz
Legend
I can imagine X terminals, both fixed and mobile ones becoming much more popular, be it in companies or even at home.
Right now you can have a Sun Niagara server, 8 cores and 32 thread on one chip, enough power for dozens workers in cubicle doing their browsing and office things. (my university has old application servers with 4 or 8 discrete Ultrasparc CPUs instead..)
one+ year from now we'll begin to see 4 powerful cores and 4 gigs of RAM on consumer machines. I can imagine such a gaming PC with GPU under windoze vista, running at the same time a virtualized linux/BSD/solaris serving desktop environment and apps to cheap X terminals or outdated PC for the browsing, mail, audio, SDTV streaming, gaming (some that is light on graphics resources) etc.
i.e., more centralized computing.
Right now you can have a Sun Niagara server, 8 cores and 32 thread on one chip, enough power for dozens workers in cubicle doing their browsing and office things. (my university has old application servers with 4 or 8 discrete Ultrasparc CPUs instead..)
one+ year from now we'll begin to see 4 powerful cores and 4 gigs of RAM on consumer machines. I can imagine such a gaming PC with GPU under windoze vista, running at the same time a virtualized linux/BSD/solaris serving desktop environment and apps to cheap X terminals or outdated PC for the browsing, mail, audio, SDTV streaming, gaming (some that is light on graphics resources) etc.
i.e., more centralized computing.