R4xx will break Moore's law

I think the VP's comments have been taken out of context (or he worded them incorrectly). Doesn't hundreds of millions of transistors simply mean more than 100M?
 
IIRC, If you look at graphics chips in isolation, they have been going up faster than Moore's Law since the start of the 3D age. I think I saw an article on this once. Might even have been here at B3D. Or I might just be talking cobblers. (Cue call of 'no change there then'.)
 
naah... who gives much about Moore's Law and breaking it...

BUT, breaking Murphy's law... That's something! ;)
 
Just a quick recap of that Synopsys announcement...

MOUNTAIN VIEW, Calif., May 14, 2003 - Synopsys, Inc. (Nasdaq:SNPS), the world leader in integrated circuit (IC) design software, today announced that ATI Research, a subsidiary of ATI Technologies, Inc., has adopted Synopsys' DFT Compilerâ„¢ SoCBIST to implement the design-for-test architecture for its upcoming next-generation visual processor. SoCBIST is an extension to DFT Compiler, a key component of Synopsys' Galaxyâ„¢ Design Platform. By using SoCBIST, ATI is able to improve test quality and reduce test cost for one of their most important designs.

ATI's visual processing unit (VPU) has more than 200 million transistors of digital logic. A design of this size and complexity requires not only extremely high stuck-at fault coverage, but also thorough testing for delay-related defects, the preponderant defect type in 0.13 micron process geometries and below. Using basic scan methods, excellent delay test requires up to 6X more tester time than required for stuck-at faults, which already is at an unacceptable cost of test.
Click to expand...

http://www.synopsys.com/news/announce/press2003/ati_socbist_pr.html

MuFu.
 
so now somebody tell me what you can do with additional 100+M trans.
compared to the r300 feature set

+vs3.0,ps3.0
+fp32
+improved AF
+what else
 
Discalimer: I have absolutly no hard facts on R420, so this is all pure speculation, but seculation based the gaming landscape coming up...

IMO, I get the impression ATI won't move to FP32 until the API requires it, so if while its still a DX9 part then I think they'll stick to DX9 requirement in that area. Some people believe the extra trannies will come from increased with of the pipelines, but I get the impression that there will be an increased depth in the pixel shaders - i.e. and 8x1x2 configuation (pipes x texture samplers x pixel shader units). I'd also guess that there will be an optimised stencil rendering path per pipeline as well.

Anyway, I'm wondering if R420 isn't sounding somewhat ambiteous at this point. A new 200M transistor chip done in a year by the same teams as the previous part (9800) - sounds like a tall order.

One thing I would say is that becuase R420 is said to be an R300 development it has previously given people the impression that it would very much be an R300 type chip. ATI themselves believe this actually to be more like NVIDIA's business model. R100, R200 and R300 were all fresh designs, whereas even through the new generations of NVIDIA's chips you can see the path back from the previous generation - the leap from R300 to R420 is more like the leap from NV20 to NV30 for ATI.
 
DaveBaumann said:
Discalimer: I have absolutly no hard facts on R420, so this is all pure speculation, but seculation based the gaming landscape coming up...

IMO, I get the impression ATI won't move to FP32 until the API requires it, so if while its still a DX9 part then I think they'll stick to DX9 requirement in that area. Some people believe the extra trannies will come from increased with of the pipelines, but I get the impression that there will be an increased depth in the pixel shaders - i.e. and 8x1x2 configuation (pipes x texture samplers x pixel shader units). I'd also guess that there will be an optimised stencil rendering path per pipeline as well.
Click to expand...

well for me as a gamer i would rather see kick ass PS performance for the near future games than fp32 which might be nice to have for PR but don't give you much in reality(just yet). Still i remember the comment from tim sweeney about fp32 and as minimum for his next engine(game). So if the r420 don't support fp32 , we'll see no fp32 support from ati in the next 18month after the r420 release?
 
Hmm, I dunno. ATI really, really surprised everyone with R3x0. If you were ATI, wouldn't you be thinking how good it would be to pull off the same trick twice? Somthing amazing that would cement the 18 months of domination you've just enjoyed, and shut up those people who say it's only a one flukey hit when Nvidia was out of the game.

I suspect that Dave Orton is once again looking for excellence, not just another round of wheedling more money out of customers with the same tired old ideas rehashed into a faster clock speed like their main competitors.
 
FWIW, I'd guess nobody moves to 200+ transistors until 90 nm. Unless you're adding a lot of 1T-SRAM.

Yield for .13u is still between 40-70%, and doubling the size of your chip will (roughly) half the yield (assuming the yield hit is due to random defects). I don't see it as being economically viable.
 
RussSchultz said:
FWIW, I'd guess nobody moves to 200+ transistors until 90 nm. Unless you're adding a lot of 1T-SRAM.

Yield for .13u is still between 40-70%, and doubling the size of your chip will (roughly) half the yield (assuming the yield hit is due to random defects). I don't see it as being economically viable.
Click to expand...

What do you know of TSMC's low-k 0.13u process at this time?

MuFu.
 
Roughly....

75 million Transistors x 3 = 225 million

Give or take a several million here or there.

More pipelines = Yes

More depth = yes
 
MuFu said:
What do you know of TSMC's low-k 0.13u process at this time?
Click to expand...

Only what I hear through the grapevine--its worse than their normal process. (which likely means worse than 40% yield)
 
Anyway, I'm wondering if R420 isn't sounding somewhat ambiteous at this point. A new 200M transistor chip done in a year by the same teams as the previous part (9800) - sounds like a tall order.
Click to expand...

the leap from R300 to R420 is more like the leap from NV20 to NV30 for ATI.
Click to expand...

If as you surmise the R420 is an Nv20 to NV30 style leap and ATi got some tools to reuse physical units (iirc) wouldn't it be possible to do this level of jump in a year? Apart from the possible jump to PS/VS 3.0 what else would there be to do for them? (apart from the usual tweaks and bug testing)

Just guessing here.
 
Hellbinder, according to your logic, the R300 and R350 have 150 transistors ;)

Isn't the RV350 more like 65M anyway?
So, considering it's be more like 2.5x because to triple power, some things don't really have to be triped ( caches can only be doubled without real problems, Hi-Z buffer size doesn't have to be bigger, that sort of stuff )

So... 65*2.5 = 162.5M

That's much more in line with what I'd expect from ATI in that timeframe ( H1 2004 )

Also, Russ, I think you're forgetting there WILL be GPUs ( and more than one ) doen on 0.11u. I don't know about ATI, but I do about nVidia ;)

BTW, Dave, I think saying the difference between R300 and R420 would be roughly the same as NV20 to NV30 seems way too ambitious. Remember, the pixel pipelines of the R420 are barely modified according to rumors ( just adding a few things on top of it to make it PS3.0. compliant )
So, the VS units might be very modified. I don't know. But the NV30 VS units were also very modified, while at least, their PS units were modified not a lot, but still quite a bit!

So, I'd say the leap there might be more between the NV25-NV30 one and the NV30-NV35 one. Although I'd love ATI to proof me wrong, obviously! :)


Uttar
 
RussSchultz said:
doubling the size of your chip will (roughly) half the yield (assuming the yield hit is due to random defects).
Click to expand...
This is wrong.

If defects were random across the whole wafer, doubling the size of each die doubles the number of bad chips, while simultaneously halving the number of total chips. This is a non-linear function.

I don't know anything about foundries, of course. I have no idea even if defects are random or not.
 
Man, I didn't know simple math could be so hard :(

Moore's law would state that every year transistor's double. R300 was announced in July, 2002. If R420 is announced as estimated in December, 2003, then it is about a year and a half later. The R420 SHOULD have around 300 million transistors if it is released at the beginning of 2004 if it is not breaking Moore's law.
 
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