I have a hard time finding where he said that GT216/18 were cancelled.
He was spot on with 212/214 being cancelled, the tape-outs of 216/18 seem to coincide with the production week stamp on the "leaked" 216-350 package.
Nvidia GT300 core: Speculation
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I have a hard time finding where he said that GT216/18 were cancelled.
He was spot on with 212/214 being cancelled, the tape-outs of 216/18 seem to coincide with the production week stamp on the "leaked" 216-350 package.
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DegustatoR
Veteran
Vincent, the image won't show up if you're not registered and authorised on nvidia's forums.
What's in it?
OK, i see it now:
What's in it?
OK, i see it now:
Your image doesn't show up since you're not linking to a picture but a link to an attachment, you can only see it when you're logged in on the nv site.
Simon Green nVidia Developer said:
Anyone seeing this change in GT300, it was obviously a bad choice before.
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I'd say that from a GPGPU perspective it's anything but a bad choice; it's rather a bad choice for the mainstream consumer market where I as a buyer have dedicated transistors for something that I won't be able to use.
Yep, which makes it all the more mysterious. How are they going to accomodate the HPC crowd (which they seem intent on doing) while limiting the amount of transistors dedicated to them? Based on the material I've been able to find so far it seems that doing it AMD's way will be very expensive if they provide the same level of functionality as GT200's DP unit (AFAIK AMD's version right now doesn't provide FMAC's etc). So they might actually stick with the dedicated units.
Jawed
Legend
Fused Multiply Accumulate
It has nothing to do with compilers. You lose precision if you round the result of the multiplication before the addition. In an FMAC the rounding is only done after the ADD.
A dedicated HPC chip would be one of those very funky theories but it doesn't make sense to me from many perspectives. It would simply cost them way more than anything else.
Every fp operation involves loss of precision. The point is, how many codes can actually take advantage of the FMA/FMAC instructions. Those most likely are, n body, FIR and matrix multiplication. Raw n body is pretty rare, you use FMM in a practical problem. For FIR filters, convolution is often preferred. As for matrix multiplication, all by itself, it is a very small part of the HPC problem space.
Yeah but what's your point though? Obviously Nvidia added the capability because they intend to peddle Tesla to people who care about it. And the CPU guys are gonna have it soon. In any case, does anyone have detailed info on AMD's DP support? Besides a few cursory mentions in some RV770 reviews I can't find anything along the lines of this table or examples of its usage.
My point is that as long as the chip kicks ass, nobody cares if it does FMADD/FMAC or not. Of course, FMA/FMAC improves perf, but it is not a must have. I am all for having FMA capability, but I won't take a GPU which has FMA but lower perf/W/$ over one which does not have FMA but higher perf/W/$.
In case you missed it we were discussing DP for GPGPU applications. I'm not sure how the chip "kicking ass" is relevant. Why so sensitive about it anyway? Nvidia has their priorities and you're free to ignore them if they aren't aligned with yours. But I'm sure the target audience finds this functionality useful else it wouldn't have been implemented.
I am not sure why the disconnect is there. When people look for chips for an upgrade/ new facility, they look at perf/W/$, and not whether or not chip x does FMA or not. The demand is perf/programmability/driver stability etc. A product that does better on this count will win in the HPC (GPGPU) marketplace even if it doesn't do FMA. Of course, all modern chips do FMA, but it is not a marketing bullet point.
That's why I asked for examples of people using AMD's DP capabilities. You're implying that their approach is perfectly fine for HPC applications but I haven't come across anything demonstrating its usage or documenting its pros and cons. Denorm support for example is a big deal but I can't find any info on how those are handled by AMD's hardware and at what performance.
If you read a few posts above we're contrasting AMD's iterative approach with Nvidia's dedicated hardware. The question is whether you can provide the same level of functionality using the former. Perf/W/$ doesn't mean anything if the hardware isn't sufficiently functional for your needs.
If you read a few posts above we're contrasting AMD's iterative approach with Nvidia's dedicated hardware. The question is whether you can provide the same level of functionality using the former. Perf/W/$ doesn't mean anything if the hardware isn't sufficiently functional for your needs.
I know at one point AMD couldn't do certain transcendental functions with DP, but I believe that was a software limitation. I don’t know if that’s still true or not (or if it really was a software limitation).
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