KK talks about 1PFLOPS CELL-based server cluster...

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PC-Engine

Banned
Cell-based Cluster Structure Boosts Performance to 1 PFLOPS
A cluster server using the Cell was what Kutaragi proposed as a future server environment. A rack design combining 16 units, each of which consists of eight 2.5 GHz Cell microprocessors, can achieve an operation rate of 25.6 TFLOPS (tera floating-point operation per second). With 40 of these racks installed in a room, an operation rate is estimated to reach 1 PFLOPS (petaFLOPS).
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Can someone explain to me what the point this dream is about? Will it be used for rendering CGI movies?

http://techon.nikkeibp.co.jp/english/NEWS_EN/20051028/110212/?ST=english
 
For one thing, powering online worlds that process and render and pass the screens to dumb portables. It's something Sony have apatent for. Eg. Get PS3 to play MGS 4, but link it to your mobile phone and upload the graphics, so you can play on the move without needing a mobile phone with the power of a PS3. But moreso, powering huge communities.

And of course there's the boring scientific applications for supercomputing, especially valid when they get the DP enhanced Cell out there.
 
Cheap (compared to current ones like blue gene) super computer maybe. If it is not expensive to manufacture a CELL processor, you can built one with around ~5000 cell processors. Of course, someone still has to solve problems about how to connect them and distribute workload efficiently so that the system can approach peak processing.

It can be used for a lot of things. Weather prediction, physics simulation (on quantum level or on very large scale - not game physics :) ) are examples of the applications that come to my mind.. There are a lot of applications for which you need a lot of teraflops..
 
Maybe with another iteration of CELL the double precision performance could be increased thus making it a better choice for super computing.
 
Pc-Engine there is a new refined version of cell that gets half the DP power vs. Sp power, which means you now have a very powerful DP system.
 
There's nothing to suggest it would have half the DP performance vs SP though. That just seems to be wishful thinking and/or conjecture. Even if true there's nothing to suggest the SP performance will stay the same ie if you need to lower SP performance to get higher DP performance then it's not much of a boost. For example take the current CELL in PS3 with 200+ GFLOPS of SP. If you need to lower it to 100GFLOPS of SP to get 50GFLOPS of DP (2:1) its not that much of a leap.
 
If they really upgrade the DP FPU in CELL to 1:2 of SP FPU, I think the biggest problem will be the memory bandwidth, unless they also upgrade the memory subsystem as much.
 
Xenus said:
Not necessarily XDR is serial therefore everytime you add a memory chip bandwith increases.
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No, current XDR is always 3.2Gb/s per lane. There are faster versions planned in the future, but if your chip has a predetermined number of lanes, it's bandwidth remains the same regardless the number of devices.
 
pcchen said:
If they really upgrade the DP FPU in CELL to 1:2 of SP FPU, I think the biggest problem will be the memory bandwidth, unless they also upgrade the memory subsystem as much.
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Would depend on the algorithm tho. Simple matrix multiplies a la linpack would perhaps be affected, but stuff like protein folding, climate modelling etc probably is a little more complicated. :)
 
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