ISSCC08: 45 nm Cell is 115mm²consumes less than 20 watts

[Farid]

Information courtesy of RWT:
http://realworldtech.com/page.cfm?ArticleID=RWT022508002434

Highlights of the 45 nm CELL processor presentation are as follows:

• No architectural or micro-architectural changes- same basic floorplan is retained from the 90 nm and 65 nm floorplans.
• Quick shrink – choosing between smaller, faster or lower power – IBM opted for lower power.
• The 45 nm CELL processor is designed to hit same frequency (3.2 GHz) as previous generations of CELL processors, but at much lower power levels.
• Power consumption of the 45 nm CELL processor is less than forty-percent that of the 90 nm CELL processor – now less than 20 watts.
• Process Scaling Much Less than Linear. The 45-nm-CELL processor has a die size of 115 mm2 on the 45 nm process.
• No High-K gate-oxide or Metal-Gate electrode in the 45 nm SOI process used by the 45 nm CELL processor.

The 45nm Cell has quite small die size, making a CELL BE+RSX SOC a possibility, even at 45nm, for the next revision.

 

[archangelmorph]

Information courtesy of RWT:
http://realworldtech.com/page.cfm?ArticleID=RWT022508002434



The 45nm Cell has quite small die size, making a CELL BE+RSX SOC a possibility, even at 45nm, for the next revision.

Sounds about right for the PSThree: Slim & Light..

 

[Crossbar]

Power consumption of the 45 nm CELL processor is less than forty-percent that of the 90 nm CELL processor – now less than 20 watts.

Maybe that will help Cell find a place in some other CE devices like TV sets.

 

[Quaz51]

I think it's mistaken
35/40w instead

 

[AlNom]

20W < 40% of X(90nm)

X < 50W Sounds a bit too good to be true Or did they mean less than 40% of 65nm, 3.2GHz Cell ?

 

[Crossbar]

This diagram supports the 40% part of the statmement:

Have anyone seen the power spec numbers (wattage) of the 90 nm Cell at 3.2 GHz?

Someone measured the power consumption of the PS3 to be about 170 W during game play if I remember correctly. Distribute that number over PSU losses, RSX, memory, BC chips, HDD, BDD, southbridge, etc. 50 W may not be that unreasonable.

 

[....]

How does this compare to other chips? Say of similar performance, would the DP cells use substantially less power than other alternatives at 45nm, that they'd be the best choice for applications like supercomputing?

 

[Farid]

Sounds about right for the PSThree: Slim & Light..

I would expect two revision for the PS3. And one of theses would happen before any SOC version. A 45nm Cell B.E plus a 65nm or 45nm RSX would enough for Sony to release a first redesign.

The PS3 is way too big, and that's a negative point Sony is more than willing to address as soon as possible. Not only PS3's size can be seen as deterrent to some potential consumers but its size is inherently increasing production and shipping costs for Sony.

Another, more cynical, point in favour of this theory of an "in-between PS3 and PSThree design" is the inevitabe increase in market visibility, thanks to the initiated marketing push, which might lead to a market repositioning. And that's exactly what the product needs in its homeland market, Japan.

 

[Arwin]

20W < 40% of X(90nm)

X < 50W Sounds a bit too good to be true Or did they mean less than 40% of 65nm, 3.2GHz Cell ?

I think that may be right. 50W for RSX, and 20W for the rest, makes for the 120W that the latest pre-65nm revisions of PS3 had I think? Though that chart up there looks convincing too.

 

[AlNom]

I think that may be right. 50W for RSX, and 20W for the rest, makes for the 120W that the latest pre-65nm revisions of PS3 had I think? Though that chart up there looks convincing too.

I wasn't talking about RSX X was just a variable.

 

[Crossbar]

I would expect two revision for the PS3. And one of theses would happen before any SOC version.

Jim Kahle was kind of evasive about a future SOC when confronted with the question in fall 2006.

DT: With Moore’s Law, is it inevitable that they will wind up on one chip?

JK: If you look at the PlayStation 2, eventually the graphics did get integrated into the Emotion Engine. Sony has talked about that. Definitely from a cost reduction view. Now we have to look at it from a performance point of view too. That is something we have to study for the future. Even beyond PlayStation 3. I don’t know if it is inevitable. We have to understand the pros and cons of it.

The fact that the RSX and Cell are on different processes (Cells significantly more expensive) and the fact they both have separate buses to external memory may make integration more complicated.

Perhaps they will go and integrate RSX and the southbridge chip on 35 nm and keep the Cell separate.

There still seem to be plenty of room for future die shrinks of Cell if you start wrapping the IO interface parts around the core CPU logic.

 

[ADEX]

I think it's mistaken
35/40w instead

Yes that's what I'd figured and.

The graph also supports it - Cell at 90nm was 110 Watts (with 8 SPEs).

 

[Crossbar]

Cell at 90nm was 110 Watts (with 8 SPEs).

Do you have a source to support that? Is it at 3.2 GHz?

All I find are estimates of about 80 W at 4 GHz and 1.2 V, like this one. They are all based on this ancient graph from the 2005 ISSC presentation of the 221 mm2 Cell prototype.

 

[Arwin]

I wasn't talking about RSX X was just a variable.

I know that. I was just thinking along the line of 50W for Cell, 50W for RSX, 20W for the rest could add up to the 120W that I read the pre-65nm $399 PS3 used.

 

[Mobius1aic]

Well whatever the benefits from less power usage, this is pretty impressive, considering it's taken forever for MS to get 65 nm version of the Xenon and Xenos up and going, but Sony is on a role. Is it just me or does it seem like Sony has a much closer relationship to IBM than Microsoft does? I guess it's because Cell is for so many other things, and a much more marketable product therefore more important to IBM?

 

[Carl B]

Is it just me or does it seem like Sony has a much closer relationship to IBM than Microsoft does? I guess it's because Cell is for so many other things, and a much more marketable product therefore more important to IBM?

They do have a closer relationship with Sony, but not for any of the above so much as shared R&D expenses in areas that benefit IBM's other operations and Sony's investment in the East Fishkill fab. Not to mention Linux-related efforts, where obviously IBM and MS don't have much of a relationship. I certainly don't think though that MS' and IBM's console-related relations are acrimonious in the least though. Cell is simply the perfect processor for IBM to highlight these node transitions on. Microsoft may be going to TSMC for 45nm anyway if rumors are to be believed.

PS - Worth noting that two threads on this topic already exist...

Here, from post #63 onwards: http://forum.beyond3d.com/showthread.php?t=44858&page=3

...and here in the CellPerformance section: http://forum.beyond3d.com/showthread.php?t=46776

I think Vysez must just have been absent that week!

 

[FutureCTO]

Information courtesy of RWT:
http://realworldtech.com/page.cfm?ArticleID=RWT022508002434



The 45nm Cell has quite small die size, making a CELL BE+RSX SOC a possibility, even at 45nm, for the next revision.

Just so you know the RSX hits 45nm in December this year.
Immediately following they will work on a Cell+RSX attempting to remove the FlexI/O interface.
Which are still 65nm if I understood some engineering comments correctly.
At this time the FlexIO area is close to 20% of each chip.

Removing anf combining them would result in a large amount of silicon savings.
So it would not be excessive to imagine Cell+RSX for the next ISSCC and production by June 2009.

 

[Crossbar]

Immediately following they will work on a Cell+RSX attempting to remove the FlexI/O interface.
Which are still 65nm if I understood some engineering comments correctly.
At this time the FlexIO area is close to 20% of each chip.

More like < 10%, you have a picture of the 45 nm Cell die a few posts above, the RSX was originally about the same size as Cell on 90 nm (230 -235 mm2 IIRC).

The FlexIO on the RSX is likely a little smaller than on the Cell as Cell has some FlexIO dedicated for the southbridge communication.

Though you may be right that they will be integrated later on a 32-35 nm process, but I am not betting any money on it. If the Cell starts to find its way into other CE devices as indicated by the news about an upcoming Cell powered Toshiba TV there may be economies of scale in keeping the Cell separate in the future as well.

Edit: As someone mentioned before these die shrinks don´t come for free, if you can share the cost with others, you will save some serious money.

 

[FutureCTO]

More like < 10%, you have a picture of the 45 nm Cell die a few posts above, the RSX was originally about the same size as Cell on 90 nm (230 -235 mm2 IIRC).

The FlexIO on the RSX is likely a little smaller than on the Cell as Cell has some FlexIO dedicated for the southbridge communication.

Though you may be right that they will be integrated later on a 32-35 nm process, but I am not betting any money on it. If the Cell starts to find its way into other CE devices as indicated by the news about an upcoming Cell powered Toshiba TV there may be economies of scale in keeping the Cell separate in the future as well.

Edit: As someone mentioned before these die shrinks don´t come for free, if you can share the cost with others, you will save some serious money.

I was including the I/O controller. It seems unusually large for a 2 port 512 data bit controller.
Though maybe I shouldn't. But when connecting the two a new single I/O controller seems reasonable to expect.

 

[Heinrich4]

In case CBE+RSX "uno"....super companion chip whats hapen with ?