Intel reveals its first 450mm wafer

[Squilliam]

450mm wafers in the 10nm node -- the technology required to pull that off properly is simply astounding. Imagine how many quadrillions of transistors you could cram onto a 450mm wafer at 10nm gate length.

Won't they suffer a drop in yields going to 450mm? If they have that and low yields from 10nm then it could be a toxic combination.

 

[Wynix]

Won't they suffer a drop in yields going to 450mm? If they have that and low yields from 10nm then it could be a toxic combination.

Assuming 450mm decreases yields dramatically, they could stick to 300mm until the yields improve enough for 450mm to be viable and start off 450mm using the older 14nm process.

 

[Albuquerque]

Not more astounding than the amount of money required.

At the end of the day, there are some things that you simply can't just apply money to make it work. The expertise to keep variability down (ie avoiding the yield drop due to lithographic focal skew at the edges of such a "huge" wafer) to such a point that 10nm gate-length transistors are viable is insane.

If your feature size was something like 45nm, then you have more survivable error rates on those edges of the wafer where yields always drop. But at 10nm?

You need a ton of smart people, a ton of very custom technology built by years of iterative research and development by those smart people, and a lot of discipline to keep it all on track to get to that point. Just shoveling money at it wouldn't get you there...