FX60 Benchies

Geo

Mostly Harmless
Legend
Has NDA lifted? I got Maximum PC for February in the mail yesterday, and it has some benchies. . .

Edit: Fifteen in fact, vs Intel 955EE. NDA lift seems to be the 10th, by google consensus --so it must be the "we swear it prolly won't get to too many mailboxes before the 10th --maybe" print exception. :)

EditII: Oh, the results? :LOL: More red buttcheeks for Intel. 9-6 in the fifteen tests (Sysmark, Premiere, Photoshop, Quake, Fear, 3DMark05, 3DMark03, PCMark, Nero). Quake and Fear more than 20%. . .
 
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geo said:
Has NDA lifted? I got Maximum PC for February in the mail yesterday, and it has some benchies. . .

Edit: Fifteen in fact, vs Intel 955EE. NDA lift seems to be the 10th, by google consensus --so it must be the "we swear it prolly won't get to too many mailboxes before the 10th --maybe" print exception. :)

EditII: Oh, the results? :LOL: More red buttcheeks for Intel. 9-6 in the fifteen tests (Sysmark, Premiere, Photoshop, Quake, Fear, 3DMark05, 3DMark03, PCMark, Nero). Quake and Fear more than 20%. . .

We got an FX-60 machine from AMD recently, haven't had time to do that much benchmarking but it sure is a truly excellent processor. Especially for multithreaded games (of course) like the one we are working on.
 
The new PC Gamer arrived over a week ago and on page 76 had a FX-60 review. Both are Future Publications products. But, no, the NDA hasn't expired yet.
 
Max PC reviewed a Falcon NW Mach V with a water cooled FX60 @ 2.9GHz :) Good lord.
 
Its a funny world where NDA is broken by a print publication with everyone on the internet sitting around waiting :???:
 
malficar said:
I want to see an AMD dual core that comes at 3.0GHz stock. Wonder how long of a wait I have in store.

Considering their unicores haven't hit that frequency yet, probably middle of '06 or so.
 
malficar said:
I want to see an AMD dual core that comes at 3.0GHz stock. Wonder how long of a wait I have in store.
How bout they just keep increasing performance per clock and continue to ramp up clock speeds?
I personally see no point in wanting to s XXX chip at XXX frequency
If amd wanted they could design a dual core chip at 3+ghz but have deep pipeline so it wouldn't end up helping much except in certain situations... like the P4.
I'd rather they just make a multicore chip this year that is say 10~%+ faster performance wise per clock/core and they can continue to scale clockspeeds, rather than just shoot for clockspeeds and doesn't use up power like it's no body's business.
Given a A64 hasn't scaled that much more than a barton and yet completely thrashs it really who cares about pure clockspeed?
 
radeonic2 said:
Given a A64 hasn't scaled that much more than a barton and yet completely thrashs it really who cares about pure clockspeed?
That is due to the integrated memory controller though right? If so then well they can't integrate it again :) Maybe they will think of something else to do next time.
 
Sxotty said:
That is due to the integrated memory controller though right? If so then well they can't integrate it again :) Maybe they will think of something else to do next time.
Yes. though maybe they could make a SMT A64.. that should help them in multithreaded applications and would let their single core users have the smooth multitasking performance of P4s.
But they would need to do a better implementation than intel to where it always helps, never hurts
 
radeonic2 said:
Yes. though maybe they could make a SMT A64.. that should help them in multithreaded applications and would let their single core users have the smooth multitasking performance of P4s.
But they would need to do a better implementation than intel to where it always helps, never hurts

Multithreading on the A64 as well as the Pentium M is not a possibility due to their architectures. P4s have substantially better branch prediction which is needed due to their long 20 stage (Northwood) and 31 stage (Prescott) pipelines; these characteristics are what make HT possible.
 
ANova said:
Multithreading on the A64 as well as the Pentium M is not a possibility due to their architectures. P4s have substantially better branch prediction which is needed due to their long 20 stage (Northwood) and 31 stage (Prescott) pipelines; these characteristics are what make HT possible.
...And why couldn't they implement better branch prediction and add a few more stages?
Oh and what about the G5's SMT? it has a 16 stage pipe.. more than an A64 but less than a P4.
 
radeonic2 said:
...And why couldn't they implement better branch prediction and add a few more stages?
Oh and what about the G5's SMT? it has a 16 stage pipe.. more than an A64 but less than a P4.

Longer pipelines allow for higher achievable frequencies but at the same time less instructions per clock. Increasing clocks to achieve higher performance is becoming infeasible; this is why we are seeing multiple cores and processors, which is more efficient at multitasking to begin with, and why intel has basically abandoned its netburst architecture.
 
ANova said:
Longer pipelines allow for higher achievable frequencies but at the same time less instructions per clock. Increasing clocks to achieve higher performance is becoming infeasible; this is why we are seeing multiple cores and processors, which is more efficient at multitasking to begin with, and why intel has basically abandoned its netburst architecture.
Ya I'm well aware of that but I was just thinking the G5 isn't nearly as long as a prescott and still manages SMT, although I'm not sure how effective it is.
 
radeonic2 said:
Ya I'm well aware of that but I was just thinking the G5 isn't nearly as long as a prescott and still manages SMT, although I'm not sure how effective it is.
Are you sure? The G5 uses two cores (and now two dual cores), so of course it will be good at multitasking.
 
I don't think SMT has anything to do with the number pipeline stages. POWER5 has SMT, and its pipeline still has less than 20 stages.
However, SMT is not an easy thing to do (mostly about verification). And PowerPC G5, which is based on POWER4, does not have SMT.
 
er I was thinking of the power5... thought the G5 used it.. it uses the power4:oops:
Well atleast I knew some ibm made cpu has SMT...
 
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ANova said:
Multithreading on the A64 as well as the Pentium M is not a possibility due to their architectures.
Well duh! Neither have multithreading implemented in hardware so of course it isn't possible. ;) Nothing that says it couldn't be done tho if intel/AMD wanted to.
 
ANova said:
Multithreading on the A64 as well as the Pentium M is not a possibility due to their architectures. P4s have substantially better branch prediction which is needed due to their long 20 stage (Northwood) and 31 stage (Prescott) pipelines; these characteristics are what make HT possible.
Why should multithreading need good branch prediction? In fact you don't need it at all (sun niagara t1 has simple in-order, no branch-prediction execution cores), branch prediction actually "hurts" the potential benefits of multithreading.
It's true though A64 and P-M may not be suited well for multithreading (neither is the P4 for pretty much the same reasons actually). Those cpus concentrate a lot on increasing ILP and always keeping the cpu busy with a single thread, so there is simply not much to be gained by the ability to switch to different threads (you might still gain something in "multi-tasking smoothness" because two threads can be run simultaneously, but the overall time needed for multiple tasks won't really go down). In particular the A64 would probably benefit the least from multithreading support out of these 3 cpus, since the P4 can at least switch to a different thread for hiding memory latencies (or at least I think it can), but on the A64 there is obviously less to be gained from that (due to the lower latency memory access).
 
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