Panajev2001a
Veteran
Fujitsu was also present to outline their next-generation SPARC64 processor: SPARC64 VI. Code named Olympus and due to arrive late in 2005 or early 2006, the chip features dual cores and is expected to clock at 2.4 GHz at 0.09µ. Weighing in at 690 million transistors, Olympus will sport a 6 MB on-chip L2 cache as well as a 256 KB L1 cache (128 KB Instruction, 128 KB Data). SPARC64 VI appears to be a dual-core variant of SPARC64 V, and therefore does not seem to be based upon an entirely new core design.
They can be big and run pretty fast ( as I said other times not all the CELL chip has to clocked high... multiple clock domains [I know people will try to see how this relates to CELL and I gave a small answer to that here linking to an argument I already made in this forum in the not so remote past] ) if enoug attention is dedicated to heat extraction and dissipation.