ELSA hints GT206 and GT212

[AnarchX]

http://en.expreview.com/2008/09/09/elsa-hints-nvidias-next-step-is-45nm-gt212/

Already known code names, but now with process and performance estimation.

Since there are some rumors about 32SP-clusters, could be the number after GT2 the number of clusters, so GT212 with 384SPs and 96TMUs?

 

[fellix]

...so GT212 with 384SPs and 96TMUs?

96 TMUs = 12 TPCs * 8 TMUs

12 TCPs * 24 SPs = 288 SPs
. . . . .

I don't think so, or that would be a huge waste of efficiency, even with 512-bit GDDR5 interface, if NV is really able to squeeze a die area for another couple of TPCs... or more.

The thing must go for a shocking diet, this time -- cut the memory interface and bump the clock rates all over the place.

 

[Ailuros]

If that thing would have 32SPs/cluster then the total amount is 384 and not 288.

 

[fellix]

Yep, I didn't pay attention to the 32 SPs note, anyway--my bad.

So, this could mean NV's faith (or ability) in high clock differentials is fading?

 

[Ailuros]

So, this could mean NV's faith (or ability) in high clock differentials is fading?

Why? Personally I would expect for a hypothetical 40nm chip something like =/>1.7GHz for ALUs, but that's probably just me. Under that theoretical case it would come close to 2 TFLOPs. If on the other hand it would have 288SPs and the same FLOP target, they'd need something like 2.3GHz to get the same rate out of it.

All those numbers are of course just for the sake of an example; case B above isn't necessarily easier, since TMU/ROPs are way more sensitive to frequencies than ALUs and with a 2.5x ALU:TMU frequency ratio you'd end up with 680MHz in the first case and 920MHz in the latter.

 

[mboeller]

Why? Personally I would expect for a hypothetical 40nm chip something like =/>1.7GHz for ALUs, but that's probably just me. Under that theoretical case it would come close to 2 TFLOPs. If on the other hand it would have 288SPs and the same FLOP target, they'd need something like 2.3GHz to get the same rate out of it.

If you look at the graph above the first 55nm chip, coming in december 2008 has only a slightly higher performance as the GTX260 and the 40nm chip, coming in january/february 2009 only a slightly higher perfomance as the GTX 280.

seems all the rumours about the 55nm chip were wrong (coming in sept.; far higher performance) and the report from inquirer about the tape-out in april/may 2008 were correct after all.

http://www.theinquirer.net/gb/inquirer/news/2008/05/29/nvidia-gt200-sucessor-tapes

 

[pjbliverpool]

I'm more interested in what that new 9800+ with significantly higher performance than the old one is. Can anyone make out the text in its box?

 

[fellix]

I can spot some 750MHz base clock and 2000-ish MHz for the shader domain. Memory seems to be at 2200MHz GDDR3.

 

[Ailuros]

If you look at the graph above the first 55nm chip, coming in december 2008 has only a slightly higher performance as the GTX260 and the 40nm chip, coming in january/february 2009 only a slightly higher perfomance as the GTX 280.

seems all the rumours about the 55nm chip were wrong (coming in sept.; far higher performance) and the report from inquirer about the tape-out in april/may 2008 were correct after all.

http://www.theinquirer.net/gb/inquirer/news/2008/05/29/nvidia-gt200-sucessor-tapes

If I'd judge performance from rather simplistic roadmap diagrams like that, then the second 9800GTX+ successor should end up being something like 50% faster than the 9800GTX+ available today.

Which reliable source ever claimed that the 55nm chip will have far higher performance anyway? I'd personally call the project damage control more than anything else.

In any case my former post was rather speculative math to answer fellixs' question if NV has given up on high frequency differences. Personally I'd be very surprised if the 2.5x ALU:TMU ratio wouldn't make a "comeback" starting with the 55nm chip. Oh and the 40nm chip is likely only a small notch above GTX280 performance as much as the "new" 9800GTX+ is about 50% faster as the 9800GTX+.

Last but not least I've stopped reading Charlie's rants a long time ago; mostly because I'm quite allergic against constant fanatic outbursts.

 

[ShaidarHaran]

I can spot some 750MHz base clock and 2000-ish MHz for the shader domain. Memory seems to be at 2200MHz GDDR3.

Heh, for a second I mistook your meaning and believed you were talking about GT200b or its successor and went

 

[fellix]

Heh, for a second I mistook your meaning and believed you were talking about GT200b...

But you must admit that this moment is a worth delusion of joy, no matter how flashy short it was.

 

[Sunrise]

Since there are some rumors about 32SP-clusters, could be the number after GT2 the number of clusters, so GT212 with 384SPs and 96TMUs?

Even tough it´s not a well kept secret that NV has to be more aggressive WRT process-node adoption in the coming months, I´m extremely sceptical that NV wants such a beast on the 40nm (40G) node this early. I´m not sure if NV wants to play the "delay", "bad margins" and "power consumption" game again.

They need something less complex than a GTX280, but faster, with 8800GT-like qualities, e.x. lower power consumption and less noise (and this time, good yields, too).

Which is exactly what I think the roadmap shows. It says GT206 and GT212 and not GTX anymore.

Also, don´t forget that NV needs something to compete with a possible, future AMD/ATI´s X2 solution, based on RV8xx, which AMD/ATI is definately not going to abandon.

On 40nm you can have an extremely good mix of complexity, clocks and efficiency if you are gonna design it around that node. Why not use that to your advantage?

 

[Ailuros]

If you're going to speculate based on codenames then you may also throw a GT212 = 2*GT206@4xnm theory into the equasion.

 

[Sunrise]

If you're going to speculate based on codenames then you may also throw a GT212 = 2*GT206@4xnm theory into the equasion.

Exactly the one I had in mind, yes. :smile:

 

[AnarchX]

Which is exactly what I think the roadmap shows. It says GT206 and GT212 and not GTX anymore.

Do not mix up card name with GPU codenames.

And I do not think, that a 96 TMUs, 384SPs, 512-Bit GPU, which should end up on 40nm* with ~300mm² is to complex.

*2,43 transistor density of 65nm

 

[Ailuros]

Dumb question for the youngsters here *cough* with better eyesight: does that slide state 40 or 45nm for GT212?

 

[AnarchX]

I thought 45LP is 45nm, while 45GS is 40nm.

 

[Sunrise]

And I do not think, that a 96 TMUs, 384SPs, 512-Bit GPU, which should end up on 40nm* with ~300mm² is to complex.

If I´m speaking of complexity WRT ASICs I refer to the density and the amount of the transistors of the ASIC. Apart from that, a 512bit bus with a die size of ~300mm²? NV´s gonna need a lot of their magic fairys for making that possible.

*2,43 transistor density of 65nm

Exactly.

Dumb question for the youngsters here *cough* with better eyesight: does that slide state 40 or 45nm for GT212?

Not dumb at all, kind of hard to make out. Looks like 40nm to me tough.

I thought 45LP is 45nm, while 45GS is 40nm.

Yep.

 

[INKster]

If I´m speaking of complexity WRT ASICs I refer to the density and the amount of the transistors of the ASIC. Apart from that, a 512bit bus with a die size of ~300mm²? NV´s gonna need a lot of their magic fairys for making that possible.

I'm thinking "320bit ~ 384bit + GDDR5" sounds much better than "512bit + GDDR3", though...

 

[Davros]

12 TCPs * 24 SPs = 288 SPs
. . . . .

Ok this is staring to get confusing,
first we has pipelines,
then we had pixel shaders and vertex shaders,
then we had sp's,
now we have tcp's.
what the bloody hell is a tcp ?