DirectX 10 working specs?

[Reverend]

Anyone knows what's on the working paper for DX10?

 

[K.I.L.E.R]

Not unless you are clairvoyant, or have inside info.

 

[Joe DeFuria]

The only "common rumor" that I'm aware of (far from any official working paper), is that DX10 is suppossedly going to unify the vertex / pixel shader model.

 

[Arun]

And considering all the x4x(x) class hardware supports a PPP, I'd guess DX10 would support it too...


Uttar

 

[Josiah]

Didn't Microsoft say something like there would be no new version of DirectX until the next revision of Windows, but PS/VS 3.0 are already in DirectX 9? So what's in PS/VS 3.0?

 

[BoardBonobo]

Pixel Shader V3.0

A programmable pixel shader is made up of a set of instructions that operate on pixel data. Registers transfer data in and out of the ALU. Additional control can be applied to modify the instruction, the results, or what data gets written out.

Instructions - ps_3_0 contains a list of the available instructions.
Registers - ps_3_0 lists the different types of registers used by the vertex shader arithmetic logic unit (ALU).
InstructionModifiers are used to modify the way an instruction works.
Masking determines what components of the destination register get written.
SourceModifiers alter the source register data before the instruction runs.
Swizzling gives additional control over which register components are read, copied or written.
New Features
Add a face register. Add a position register. Color registers (v#) are now fully floating point and the texture coordinate registers (t#) have been consolidated. Input declarations take the usage names, and multiple usages are permitted for components of a given register.

Dynamic Flow Control
The device supports dynamic flow control (if, break, and break_comp). The depth of nesting ranges from 0 to 24.

Number of Temporary Registers
The number of temporary registers supported is 32.

Static Flow Control Nesting Depth
The call/callnz/call_pred can be nested to a maximum depth of 4. Independently, loop/rep instructions can be nested to a maximum depth of 4.

Arbitrary Swizzle
Arbitrary swizzle is supported. See Arbitrary Swizzle.

Gradient Instructions
Gradient instructions are supported. See dsx, dsy, and texldd.

Predication
Instruction predication is supported. See Predicate.

Dependent Read Limit
There are no dependent read limits.

Texture Instruction Limit
There is no limit on texture instructions.

Instruction Count
Each pixel shader is allowed anywhere from 512 up to the number of slots in the MaxPixelShader30InstructionSlots member of D3DCAPS9 (not more than 32768). The number of instructions run can be much higher because of the looping support. The MaxPShaderInstructionsExecuted cap in D3DCAPS9 should be at least 2^16.

New Features:

Static flow control instructions: call, callnz, else, end, endif, endloop, endrep, if, label, loop, rep, ret
Static flow control nesting depth
Number of temporary registers
Dynamic flow control instructions: break, breakc, ifc
Predication: setp instruction, p# register
New registers: constant integer, constant Boolean, loop counter, predicate

New modifiers: arbitrary swizzle

Vertex Shader 3.0

A programmable vertex shader is made up of a set of instructions that operate on vertex data. Registers transfer data in and out of the ALU. Additional control can be applied to modify the instruction, the results, or what data gets written out.

Instructions - vs_3_0 contains a list of the available instructions.
Registers - vs_3_0 lists the different types of registers used by the vertex shader arithmetic logic unit (ALU).
InstructionModifiers are used to modify the way an instruction works.
Masking determines what components of the destination register get written.
SourceModifiers alter the source register data before the instruction runs.
Swizzling gives additional control over which register components are read, copied or written.
New Features
New features include the following:

Indexing Registers
In the earlier shader models, only the constant register bank could be indexed. In this model, the following register banks can be indexed, using the loop counter register (aL).

Input register (v#)
Output register (o#)
Vertex Textures
This shader model supports texture lookup in the vertex shader using texldl. The vertex engine has four texture sampler stages (distinct from the displacement map sampler and the texture samplers in the pixel engine) that can be used to sample textures set at those stages. See Vertex Textures.

Vertex Stream Frequency
This feature allows a subset of the input registers to be initialized at a rate different from once per vertex. See Vertex Stream Frequency.

Shader Output
Similar to vs_2_0, the output of the shader can vary with static flow control. Be careful with dynamic branching as this can cause shader outputs to vary per vertex. This will produce unpredictable results on different hardware.

Dynamic Flow Control
Dynamic flow control instructions are supported. The depth values allowed is a maximum of 24.

Static Flow Control Nesting Depth
Static flow control instructions are supported. The depth value allowed is a maximum of 4.

Instruction Count
Each vertex shader is allowed anywhere from 512 up to the number of slots in the MaxVertexShader30InstructionSlots member of D3DCAPS9. The number of instructions run can be much higher because of the looping support. The MaxVShaderInstructionsExecuted cap in D3DCAPS9 should be at least 2^16.

New features:

Static flow control nesting depth
Dynamic flow control instructions - break, breakc, ifc
Predication - setp instruction, p# register
Number of temporary registers
Indexing registers
Vertex textures - texld texture address instruction
Vertex stream frequency

 

[Reverend]

I am aware of DX9's shaders_3_0 (from our "Beta B3D Articles Forum"... article there not exactly, uh, complete, for lack of a better word) and I am also aware there are some here who are NDA'ed on DX10... maybe there are those here who's been "leaked" some DX10 info 8)

Besides possible/probable increases in certain lengths and instructions, what sort of, um, "new" stuff should/can we expect, given the way the industry has been heading?

 

[elroy]

Am I right in assuming that DX10 isn't scheduled to be released until the release of Longhorn (i.e. 2005)? I thought it was going to include a unified PS/VS model, and PPP support. However, because support of DX10 is so far off, wouldn't it be better concentrating on the implementation of PS/VS 3.0?

 

[Reverend]

Am I right in assuming that DX10 isn't scheduled to be released until the release of Longhorn (i.e. 2005)?

Apparently that is official.

I thought it was going to include a unified PS/VS model, and PPP support.

These two are the "rumors", and good ones at that.

However, because support of DX10 is so far off, wouldn't it be better concentrating on the implementation of PS/VS 3.0?

Well, technically speaking, there isn't even hardware supporting 3_0

 

[MDolenc]

Come on guys, chill down a bit...
There hasn't even been an official public DX 9.0 SDK update which should include a HLSL compiler update, so that HLSL will finally be able to target more then strictly base 2.0 shader functionality.
I don't think you'll find (m)any people here that are under NDA for DX 10...

 

[Zeross]

What's PPP please
Another damn acronym I hate them

Edit : isn't that Primitive Processor thing by chance ? Damn it lacks a P

 

[MuFu]

What's PPP please
Another damn acronym I hate them

Edit : isn't that Primitive Processor thing by chance ?

Yes.

It's a feature of both nV and ATi next-gen hardware (as Uttar already said - who knows who told him though, hehe...).

MuFu.

 

[T2k]

Edit : isn't that Primitive Processor thing by chance ? Damn it lacks a P

Programmable?

 

[Heathen]

So what benefits would a primitive processor bring?

 

[T2k]

So what benefits would a primitive processor bring?

Converts graphics primitives (triangles, etc) into pixels...

 

[MDolenc]

So what benefits would a primitive processor bring?

It will be able to delete, create triangles. So stuff like LOD can be moved to GPU and high order surfaces can be made programmable (and actually useful).

 

[Chris123234]

sounds cool. does it mean that it will gradually modify the model in the scene as lod changes instead of how now when you get farther away you see big changes as you go.

 

[JasonCG]

I've spoken with Microsoft management about DX9 and DX10 and quite a few other things at the Game Developer's Conference this year.

Apparently, DX10 is still very much in the planning stages, and anything you may hear about it right now is likely to change quite a bit. They're only in that "let's ask developers where they think it needs to go" stage and are in no rush to progress much further yet.

In their view, though the 3.0 shader definitions aren't perfect, the amount of flow control, precision, and sheer length of those are enough to take games really really far. Developers aren't working with them yet so they're not getting clever yet, and while 3.0 hardware might first appear this year, it'll be some time before games use them in any meaningful manner.

Hence the delay on DX10. Software doesn't even use the 2.0_extended shaders yet, much less 3.0. Developers already have a couple wishes for DirectX changes, but it makes no sense to just jump on those and discover later that there are other big things as well. It's not until devleopers start to do serious work with 3.0 shaders and hardware that they'll even know what DX10 really needs.

Long story short: even Longhorn might not include DX10. It coule well be further out than that. There's no "official" word on that yet because there's no "official" release date for Longhorn, just a bunch of wildly variable speculation. According to Dean Lester, general manager of the Windows Graphics and Gaming division, a lot of whether or not DX10 will ship with Longhorn depends on Longhorn's release date. Which is still in flux because they're trying to figure out exactly what technologies are doable and shippable in a certain time frame, and which ones will have to be Longhorn updates later (ala the USB 2.0 update to WinXP).

 

[MDolenc]

So where does this leave rumours of programmable primitive processors in not so distant hardware? Will they stayed unused till DX 10, or will MS be kind of forced to make a "DX 9.1" runtime update after all?

 

[Lezmaka]

OpenGL will be able to use em.