The lower TDP is probably because they can't dissipate that much heat up through the cache die anyway (they already got big problems cooling those small chiplets under the ihs), so that would mostly affect all-core clocks (and probably not by a lot - the last 1-200mhz are really costly now).
But the 5 ghz max boost for 7800X3D would be for 1T anyway, where heat shouldn't be a problem, and the L3 speed shouldn't be coupled to core speed anyway, so why that limitation?
And, if it's not pure product segmentation (to let the expensive ryzen 9s be the ultimate gaming cpus), would that mean that the high boost clock of the dual CCDs only applies to the cache-less one? That would be really weird for the scheduler - 5.0 GHz and big L3 or 5.7 GHz and less L3.
I just assumed it was 2 x 6 core CCD's.
Mine is 2x6, but they are not equal. All core clocks:

(and it's not just worse silicon, at these clocks ccd0 is 12-13w/core, while ccd1 is 10w/core and lower temperatures)