New XGI chips

Entropy said:
...
nVidias CEO has been at pains trying to hammer home a message about how expensive and complex it is to manufacture gfx ASICs today. One can't help wondering to what extent all that talking was done simply to dissuade other players from entering the race and eating their lunch.

Entropy

I think that in this case he wanted to make some noise for the benefit of nVidia investors, actual and potential, to "explain" why they've been having problems with .13 micron nV3x yields all year...:)
 
Dave H said:
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Whether to target .15u or .13u for a chip launching in fall 2002 was a tough decision, one that ATI happened to get lucky on and Nvidia happened to get very unlucky on. Whether to target .15u or .13u for a chip launching in winter 2003 is a no-brainer.

I'd propose it might even have been a no-brainer at the beginning of the year with the clock speed targets proposed and my impression of transistor count conservation. The only thing I might think would make 0.15 desirable is if there is some increased initial cost of entry for 0.13 or some price incentive for going 0.15, though I can't come up with a reason for this that makes sense to me at the moment. And even then, I'd still be massively confused if such a thing ended up being true, considering the chips that have already been done at 0.13.

Since the 0.15 is proposed as the author's speculation, there is a quote of XGI that follows, and the quote of XGI does not refer to that, it looks to me like a guess presented as a "scoop" with hasty thought, rather than some undisclosed info.

Guru3D said:
They simply are going to use a bigger fabrication technology, I think they will use .15 micron. This results in way higher yields and makes the product cheaper.

Doesn't seem they have specific information that they didn't share, but are interpreting what they quoted to establish this.

XGI said:
If you understand anything about wafer process, then you will know that yield rate is die size depedant! Although that every foundary claim that they have such and such yield rate but the truth is... that only applies to very small dies.
...
If you have a dual chip design, then it will result in more gross die and also very importantly higher yield! With a bigger chip single design: it result in smaller gross die * lower yieldrate!

I don't know, it doesn't seem to say anything about a larger process to me (here, or the other bits I didn't quote), but I could somewhat imagine how someone might read that into these particular parts.
 
From what I hear, current natural yield in .13u digital is still only moderate(at best about ~60%)--even for dense, regular memory cells. .13u is still on its ramp and until it reaches maturity, you'll see different products on different processes as each company weighs the risks and rewards of .13u.
 
demalion said:
XGI said:
If you understand anything about wafer process, then you will know that yield rate is die size depedant! Although that every foundary claim that they have such and such yield rate but the truth is... that only applies to very small dies.
...
If you have a dual chip design, then it will result in more gross die and also very importantly higher yield! With a bigger chip single design: it result in smaller gross die * lower yieldrate!
I don't know, it doesn't seem to say anything about a larger process to me (here, or the other bits I didn't quote), but I could somewhat imagine how someone might read that into these particular parts.
It implies a larger process to me. This is just a restatement of Moore's Law: the transistor count at which it becomes economical (balancing costs due to poor yields at the high transistor count extreme, vs. a base marginal cost due to packaging and testing costs at the low transistor count extreme) to integrate what was formerly two IC's into one IC rises at an exponential rate w.r.t. time (which is a proxy for process improvements).

Not sure if that sentence made any sense (but if anyone can figure it out, I expect you to ;)), so I'll try to restate it: Moore's Law is a statement about the point at which it becomes cheaper to combine your functionality into one chip instead of splitting it up among two (or more) chips. In particular, that crossover point (measured in transistor count) rises exponentially with time, which is another way of saying it rises exponentially with process improvements, and that process improvements tend to be roughly linearly spaced in time.

Anyways, any time it is cheaper to do something with two chips than with one, eventually (after a certain number of process shrinks) it will be cheaper to fit it on one chip instead of two. This is the logic behind the microprocessor; the integrated chipset; cell phones that surf the web, take pictures, play games and playback sound and video; SoCs; and so on.

XGI proposes to use two chips (at some unknown manufacturing process) to achieve what would appear to be a bit less functionality than what the .15u R300/R350 achieves with one. Part of the reason for this is that they except to sell many more one-chip versions of their card, and this way they can get two products for the ASIC-level engineering cost of one (although now there are extra board-level engineering costs). But part of the reason is clearly because they think it will be cheaper (or at least competitive) in terms of marginal manufacturing cost. This strongly suggests the chips are .15 and not .13.

Perhaps the chip is targeted .15 and not .13 because TSMC is indeed giving them a better deal at that process. Perhaps because the product was supposed to launch earlier--when .15 would have made more sense--but was delayed. Perhaps because XGI's engineers were more comfortable working with .15 and avoiding any tricks or difficulties that may exist at .13. Or perhaps because the yield curve at .13 is such that for a small enough chip it really is still cheaper to use .15.

In any case, the choice doesn't seem particularly forward looking. .15 may still be somewhat cheaper in the short-term, but as yields improve using .13 should easily lead to lower costs in the long-term. It doesn't seem like the right choice for a design that's meant to stick around for very long.
 
Dave H,
I read it as an explanation purely geared towards answering the question of "why did you do a two chip solution instead of one?", by explaining why one chip could be less than half the effective cost of one when achieving the same performance, and offered gains that offset the concern about increased board cost and engineering effort. I saw no implication of process in the text itself.

Russ's comment is another matter entirely, and, naturally, what you "read into" that text seems quite reasonable in light of that. :p

Russ,
I'd thought yield issues were more strongly associated with pushing clock speeds upwards, but your commentary provides a pretty clear and direct picture counter to this that would establish exactly why some of my 0.15 questions can be answered in the affirmative. I'm just wondering if you know: why is this still the situation after all this time?

I find the Xabre600 @ 300 MHz on 0.13 being announced late last year quite odd. Maybe they had gotten bitten really hard for their ambition and I didn't notice or don't recall them suffering from this as they might have, or the transistor count increase was just too much despite some of the engineers involved having some experience in targetting the process. Interesting.
 
demalion said:
Dave H,
I read it as an explanation purely geared towards answering the question of "why did you do a two chip solution instead of one?", by explaining why one chip could be less than half the effective cost of one when achieving the same performance, and offered gains that offset the concern about increased board cost and engineering effort. I saw no implication of process in the text itself.

There was no implication of process in the text itself. However, the fact that they are doing a two-chip implementation, given the level of functionality we know will be on the chip, suggests .15.
 
Dave H said:
XGI proposes to use two chips (at some unknown manufacturing process) to achieve what would appear to be a bit less functionality than what the .15u R300/R350 achieves with one. Part of the reason for this is that they except to sell many more one-chip versions of their card, and this way they can get two products for the ASIC-level engineering cost of one (although now there are extra board-level engineering costs). But part of the reason is clearly because they think it will be cheaper (or at least competitive) in terms of marginal manufacturing cost. This strongly suggests the chips are .15 and not .13.

Perhaps the chip is targeted .15 and not .13 because TSMC is indeed giving them a better deal at that process. Perhaps because the product was supposed to launch earlier--when .15 would have made more sense--but was delayed. Perhaps because XGI's engineers were more comfortable working with .15 and avoiding any tricks or difficulties that may exist at .13. Or perhaps because the yield curve at .13 is such that for a small enough chip it really is still cheaper to use .15.

In any case, the choice doesn't seem particularly forward looking. .15 may still be somewhat cheaper in the short-term, but as yields improve using .13 should easily lead to lower costs in the long-term. It doesn't seem like the right choice for a design that's meant to stick around for very long.

It is more likely to be build at UMC, and they may not have had a choice. I'm not hearing of any big chips being built at UMC at .13 and for .15 only Ati's 9200 (which still didn't get up to pro speeds on a large scale)
 
CorwinB said:
The picture on the third link mentions a 0.25u process ??? :oops:

Yes, but the sign is about the Super Video Processor. I expect it to be an external processor like the Rage Theater Chip, and this one could surely be manufactured at 0.25µm.
 
Snyder said:
CorwinB said:
The picture on the third link mentions a 0.25u process ??? :oops:

Yes, but the sign is about the Super Video Processor. I expect it to be an external processor like the Rage Theater Chip, and this one could surely be manufactured at 0.25µm.
Still those dies are huge, like way above 200 mm² ... makes me wonder what yields they get. :?:

cu

incurable
 
Die size was a surprise.
Process technology can hardly be a secret at this point, so if we have a forum member at Computex right now, or if anyone know someone who is there, could they please simply ask the XGI people present?

Entropy
 
It has a 0.13 process

computex.JPG
 
Am I right in saying that XGI's Volari V8 Duo is the first consumer product to have 2 complete GPUs running in parallel? And I mean full graphics processors with on-board T&L, therefore taking the geometry & lighting load off the CPU for the most part, not 3D accelerator chips like the twin VSA-100 chips in Voodoo5 5500 or quad VSA-100 chips in the unreleased 6000, or the ATI Rage chips in the MAXX product.

As far as I am aware, this new Volari V8 Duo card is the first use of more than one full graphics processor (not 3D accelerator) in parallel, in a consumer product.

I dont know about everyone, but i know some people including myself, draw a line between 3D accelerators like Verite, Voodoo 1,2,3,4, TNT1,2,
PowerVR Series 1,2,3, ATI Rage, (and dozens of others) and then the true graphics processors / GPUs for consumers like all the GeForces, Radeons as well as older non-consumer GPUs made by E&S, Lockheed Martin, 3DLabs, etc for worstations and arcade games and many other non-consumer applications, that have on-board geometry processing.
 
I am curious to see if the V8 Duo with it's twin DX9 GPUs can slightly outperform the R350 or NV35 in at least a few games.

To echo the sentiments of others before me, I am just glad to know that another competitor is at least targeting the high-end of the market, where NV30/35 and R300/350 are now.

I was disheartened when Creative / 3DLabs backed away from the consumer market with P10. and also the disappointment of the Parhelia.

XGI seemingly has this complete range of offerings and this will hopefully push Nvidia and ATI to strive even harder, which naturally is good for us consumers... :)
 
TR's numbers show a 9600P scoring about the same in GT2, 3, & 4. What can we deduce from the Volari Duo's comparatively high GT2 score, lower GT3 score, and very low GT4 score? Merely unoptimized drivers, or shader "weaknesses?" I mean, the Volari more than doubles the 9600P's GT2 scores, almost doubles its GT3 scores, yet is merely even in GT4.
 
Pete said:
TR's numbers show a 9600P scoring about the same in GT2, 3, & 4. What can we deduce from the Volari Duo's comparatively high GT2 score, lower GT3 score, and very low GT4 score? Merely unoptimized drivers, or shader "weaknesses?" I mean, the Volari more than doubles the 9600P's GT2 scores, almost doubles its GT3 scores, yet is merely even in GT4.

Another blisteringly fast DX 8.1 video card trying to fit into the clothes of its big brother DX 9...
 
Ichneumon wrote:

Another blisteringly fast DX 8.1 video card trying to fit into the clothes of its big brother DX 9...

If all you're trying to do is match Nvidia rather than ATI that's all you need. If it performs on par with GfFX cards without needing optimizations it's a step in the right direction.
 
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