AMD CDNA: MI300 & MI400 (Analysis, Speculation and Rumors in 2024)

[Bondrewd]

Couple things looking over the whitepaper again, they doubled the vector (CU) FP32 rate?

Yea.

more VOPD shenanigans?

No it's a more straightforward dual-issue.
940 has no VOPD (the ISA manual is out).

HWS and ACE have known to be firmware running on embedded cores for a few generations, dated back to at least “HWS” was introduced (Polaris?).

Tonga I think.

while a single agent GFX940 configuration can have only 1 HWS by nature

I'm not sure if that's correct given even the monodies have two HWS per die.

 

[trinibwoy]

No it's a more straightforward dual-issue.
940 has no VOPD (the ISA manual is out).

Chipsandcheese delivering the goods as usual with their very detailed CDNA 3 write up. Proper dual issue and an upgraded scheduler with 24!! Wavefronts per SIMD to improve chances of two ready instructions per cycle. As the article states though register bandwidth may be a limitation.

https://chipsandcheese.com/2023/12/17/amds-cdna-3-compute-architecture/

 

[Bondrewd]

Chipsandcheese delivering the goods as usual with their very detailed CDNA 3 write up

I know right.
We're all good friends.

As the article states though register bandwidth may be a limitation.

Same rules as Ampere/Ada/Hopper so yea.

 

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[DavidGraham]

When it becomes not-consistent, they do a reorg and knife a bunch of parts (which, they did! byebye the og mi350x. and byebye the og horrific Si spam MI400).

Looks like MI350 is back on track and is not cancelled.

https://twitter.com/i/web/status/1778436160039100653

 

[Bondrewd]

Looks like MI350 is back on track and is not cancelled.

Not the OG one, no. That one was different XCD n stuff.
Read the poast clearly, not that hard at all!