Recent content by Ryan Smith

This was per my discussion with NVIDIA. When I asked about how much pressure the tensor cores put on the register file, and whether that made it hard to use the CUDA pipes at the same time, I was told that it was the same situation as Turing.

Note that the new bit is being able to do RT + tensor at the same time. Also, the tensor cores are still going to eat all of your RF bandwidth, so don't expect to be able to run the CUDA pipes alongside the tensor cores.

The features are all there. But Microsoft didn't actually add the feature level enumeration to Win10 2004. https://devblogs.microsoft.com/directx/announcing-directx-12-ultimate/#comment-92 "We will be adding a 12_2 feature level in the API in the next update to Windows after 20H1. For now, all...

My understanding is that it's after culling, so 2 backface culled primitives per clock. For reference, here's the exact text on the spec for Gen11, which was 1/cycle: "Primitive / Clock (backface Cull - strips)"

Most of the tools for this are quite old these days, as low-level benchmarks don't garner the interest they once did. Unfortunately, I'm not sure what Damien was using to begin with.

Yep. Leave it to Intel to completely overhaul their geometry front end for parallel execution, and then not bother telling anyone.:lol: The upshot, at least, is that their technical team is paying attention to what's being written. So if we get something wrong, they've been giving us the...

And now the announcements have been scrubbed entirely. NVIDIA will be taking a mulligan at a to-be-determined date in the future. https://blogs.nvidia.com/blog/2020/03/16/gtc-update/

At this point I'm not expecting serious news about a new architecture. Maybe a teaser or roadmap for later in the year. But I welcome Jensen to surprise me.

Bingo. https://www.bloomberg.com/news/articles/2020-02-14/nvidia-blames-misunderstanding-for-activision-faux-pas And this is why streaming games is so hard from a business standpoint. Publishers want a cut of all revenues, even if customers own or bring their own games.

At least for the RX 5600 XT, that's not the case. The memory voltages are the same at 12Gbps and 14Gbps.

They automatically download it during driver installation. I believe this is a DCH requirement; you can't bundle the control panel with the driver.

It's probably better to say that the throughput and features of various graphics-related units were not changed. Graphics these days is about half a layer above compute, so when you change the underlying architecture, the stuff above is not quite identical anymore.

I fully expect that RDNA2 will have a new graphics architecture, which is something AMD couldn't do for RDNA(1). Navi's graphics core is essentially unchanged from Vega, which was a bit behind the curve even when it launched. So RDNA2 chips are going to be quite a big change from RDNA(1), even...

No, because AMD has not actually changed the 5600 XT specs. There are boards being sold that only run at the reference specs.

Oh I think we're in full agreement. I'm just exasperated that my prediction from last week is coming true. And while I make it a policy to avoid punching down, I do blame the press for it as much as I blame AMD. Ultimately there's definitely a lot more public attention this time around, that's...