Love_In_Rio

BVH4 is just broken in my opinion, 64-byte per BVH4 with 128-byte cachelines doesn't make sense, you're still fetching the 2nd set of 64...

FWIW:

It seems so, in Tom Henderson's leaked docs extended info article: In addition: 30 WGPs running specialised BVH8 traversal shaders vs...

AMD so far has no traversal hardware, only intersection resolve units. Traversal is software based and thats why is more cache sensitive...

RDNA 3.5 is BVH4x1, like 7700XT. PS4 pro has double the processing capability of ray intersects with BVH8x2 (8 BVH boxes and 2 triangles...

Who designed Tempest engine?. Is a CU without cache and with an DMA controller added based on the SPU design, made with AMD blocks with...

They are getting 2 cells inside with 5 integer units per SPU instead of 4 floating point ones+1 integer one. ;) Well, seriously, they...

Going from a RT unit capable of BVH4 to BVH8 plus going from 36 CUs to 60 explains the 2x-3x improvement and allows for wider BVH...