Recent content by Bob

I agree; that would not be a very competitive product.

SXM != SMX

This isn't a stupid question at all! To a first order, they achieve the same effect: leverage existing ILP to increase performance. SIMD execution is a huge, huge simplification for the HW implementation of parallel execution of instructions. Consider that in the non-SIMD case, the CPU must...

There's a lot of wrong in your reply, but I want to address this point specifically. If branch prediction makes a process "out of order", then the majority of what are considered "in order" machines need to be rebranded. I think you're confusing "out of order execution" with "speculative...

On Maxwell sm50 profiles, blocks are HW-limited to 48 KB of shared memory (each). This is the same as on Kepler and Fermi. ptxas was misreporting the capability as 64 KB per block. This is incorrect. The real HW maximum size is 48 KB of shared memory per block. SMM has a total shared memory...

There is a bug in the RC version of the ptx assembler. The limit is indeed 48 KB of shared memory per block. This will be corrected for the official release.

Shared memory per block is limited to a smaller value than the total shared memory capacity per SM.

Jeff B: Impressive!

NVIDIA GPUs have been exposing a flat address space for generic pointers since Fermi. The same pointer can be used to point to global memory, shared memory, or thread local memory. Optionally, you can make the pointers explicit and gain a performance advantage in certain situations.

That was quick...

Genefer uses fp64 for its computation. That the GeForce 680 is slower than the 580 has little to do with "scheduling". Edit: I see the 560 Ti being faster than the 680. Now that's more worrisome. I will run this benchmark tomorrow, when I have access to a 680.

Do you have any non-OpenCL benchmarks to prove that point? Or do you believe there's something about OpenCL that reduces Kepler's performance, something that doesn't apply to CUDA?

Nick, you're setting yourself up such that (pretty much) no matter what happens when, you'll consider yourself as having being right. This kind of prediction is not very useful: Save for the zombie apocalypse, most of us are already assuming that future humans will use computing devices, likely...

Sure they can, as long as they're independent instructions (and generate no resource conflict), but not at a sustainable rate. Due to a quirk of the architecture, you can issue a few instructions back-to-back from one warp before you take a small penalty, which can be completely covered by a...

I'm not sure I understand. The 680 isn't two 580s glued together. As such, its performance will vary based on the application, and you should not expect exactly 2x the performance except on artificial series of independent multiply-adds. For example, AES uses a lot of bit shifts. But bit...