Some more 3dlabs Realizm details.

glw

Newcomer
There's a very interesting PDF about the 3dlabs Realizm
boards at this website (I haven't seen it on 3dlabs site):

http://www.3dprographics.com/

VPU:
* 150 M transistors - 0.13u
* Quad digital display channels
* AGP 8x interface
* DX9 VS 2.0 capable 1k instructions
* DX9 PS 3.0 capable 256k instructions
* Hierarchical Z buffer culls up to 1024 multi-samples
per cycle
* Extensive subroutine, loop and predicate support
* Fragment processor has direct access to virtual memory
* Dual VPUs use a 64x64 pattern for load balancing

VSU:
* 67 GFlop/s - 36bit precision
* Full 16-lane PCI Express
* Unique 64-bit AGP-based interconnect to VPU
* DirectBurst memory - transparently stores rendering
commands and geometry data onboard

So all single chip boards will be AGP 8x, and all
multi chip boards will be PCI Express.
 
Hm, AGP is 32 bits in the physical interface, so either 3DLabs mixed things up, or they doubled the bus just for use between their two chips. One might ask oneself wether that would be two full 64-bit interfaces on the VSU, or two standard 32-bit ones that for reasons of marketing are added together to make numbers look bigger.

Anyway, Nvidia does 8GB/s across standard 32-bit AGP without having to double bus width...
 
991060 said:
* Fragment processor has direct access to virtual memory
what does this really mean?

It appears to mean that you can go beyond the usual
temporaries and constants in a fragment program and
arbitarily read from and write to memory.

*edit* It says that "Integrated registers act as L1 cache
for memory temps and registers." Beyond that it'll
spill to the VRAM.

Also the pixel operations have a considerable
degree of programmability above and beyond the
fragment operations.

My gut feeling is that the 3 chip boards will be THE
best graphics solutions of this generation. Unless
ATI or Nvidia have some multi-chip trickery as well.. ;)

3dlabs really have surprised me with the P20.
 
Guden Oden said:
Hm, AGP is 32 bits in the physical interface, so either 3DLabs mixed things up, or they doubled the bus just for use between their two chips. One might ask oneself wether that would be two full 64-bit interfaces on the VSU, or two standard 32-bit ones that for reasons of marketing are added together to make numbers look bigger.

Anyway, Nvidia does 8GB/s across standard 32-bit AGP without having to double bus width...

It says in the PDF that it's a 256-bit interconnect bus, connecting
the VSU to the VPUs. There also appears to be a bus between the
VPUs for exchanging framebuffer tiles for display.
 
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