Revenge^H^H^H^H^H^H RAMP IV

R

RussSchultz

Professional Malcontent
Veteran
Ok, revenge was just a hook to get some hits, but here's a PDA graphics chip designed by Korean graduate students. The report is pretty glowing, and it has some mighty interesting pieces about it. Maybe I should have used "AXE" as my hook...

http://www.embeddedwatch.com/ramp4.htm

It looks to be in a wierd process, and has somewhat strange voltage requirements for 'low power'. (.16u and a hybrid between DRAM and memory, core voltage of 2.3V).
 
Is someone really too old in his thirties to start say hardware engineering studies? I happen to have a big garage, hence the question.... :oops:
 
Looking around a bit for more info there are papers about this already in 2001 which describe exactly the same from the same people, and now its brought back into attention as new ?

IMHO it looks a lot like the BitBoys solution: throw a huge cache at it and hope the bandwidth problems will go away. Are they really serious about putting 8MB (Is that MByte or Mbit, they use a big B so I would say Bytes ?) of on-chip ram and then an additional 8x16KB (again bits or bytes, assume bytes given their notation ?) = 128KB of SRAM cache just for graphics (there is no talk about sharing this is there) ?

Other interesting numbers :

RAMP-IV is fabricated in 0.16-microns, has a die size of 11 sq. mm. with 60,000,000 transistors, a supply voltage of 2.3 V, and power consumption of 210 mW. Clock speeds are 132/33 MHz for its fast mode, 66/16.5 MHz for “normalâ€￾ mode, and 33/8.25 MHz in power-saving slow mode.
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To compare MBX HR-S (Pro):

660K gates (870K with optional VGP geometry processor)
<1mW/MHz in 0.13µm process and <2mW in 0.18 µm process
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MBX R-S (Lite):

325K gates (470K with optional VGP geometry processor)
<0.7mW/MHz in 0.13µm process and <1.5mW in 0.18 µm process
Click to expand...

First of all gates versus transistors, I believe in general a factor of 4 is used (not ?). 870Kx4~= 3.5M. Thats 3.5 (largest MBX) versus 60 or about 17 times bigger for this RAMP Core. Power Usage is a bit harder to compare given that they give one number which means very little.

IMHO all they describe is a massive texture cache hooked up to some filtering units, there is no real description of functionality or other capabilities of the system.

Interesting but given its huge size I doubt that it will find its way into mobiles or PDAs. Then again I am biased :)

All just my personal opinion of course... btw RAMP in dutch means "disaster" :LOL:

K-
 
The 60M transistor count roughly matches that of an 8-megabyte DRAM. But I find the stated 11mm2 area figure hard to believe - an 8MByte DRAM on a 0.16-micron pure DRAM process alone should be something like twice as large as that (and they don't seem to be using a pure DRAM process either, so the area should be even bigger than that).
 
We keep hearing about how good MBX is, but when will we actually see something that uses it? I know its been licensed, but….
 
Joe DeFuria said:
Roger Kohli said:
We keep hearing about how good MBX is, but when will we actually see something that uses it? I know its been licensed, but….
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Yeah, Kristof....put up or shut up! :p
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Once they´ve licensed a SoC, it´s my understanding that most of their work is done. When the licensees will actually release any products containing the specific SoC is only a matter of collecting royalties and probably some further software support.

In relative terms PowerVR has already delivered in the PDA/mobile market, so it´s rather the other wannabees that have to put up or shut up IMO. :p
 
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