GCC 4.1 optimized for Cell (?)

McFly

Veteran
Maybe not exactly for Cell alone as autovectorization is in development for longer than Cell itself, but it will at least help a lot:

One optimization that likely will be introduced in GCC 4.1 is called autovectorization, said Richard Henderson, a Red Hat employee and GCC core programmer. That feature economizes processor operations by finding areas in software in which a single instruction can be applied to multiple data elements--something handy for everything from video games to supercomputing.

http://news.com.com/Key+open-source...erhaul/2100-7344_3-5615886.html?tag=nefd.lede

http://developers.slashdot.org/developers/05/03/14/2241248.shtml?tid=117&tid=156&tid=8

Fredi
 
Autovectorization is over-hyped. Several other compilers, most prevalently icc and ecc(Itanium) already does this a few(or several?) years ago. It is very convenient for those brainlessly simple loops - in that I didn't have to spend time vectorizing such trivial code. But those loops that do the main work and take up the majority of your runtime are always guaranteed to be not simple.

To see for yourselves, just download Intel's evaluation icc, code a couple of matrix operations and see how simple code needs to be for the compiler to autovectorize it. (Icc will tell you what's vectorized.)

It is still a convenient mechanism for doing work for the simple loops, but not as exciting as you think it may be.
 
Is this something that is aimed at the Cell, or moreso at multicore processing in general?

Some of the guys in the slashdot forums seem to say that it was pushed by intel.
 
Lumine said:
Is this something that is aimed at the Cell, or moreso at multicore processing in general?

Some of the guys in the slashdot forums seem to say that it was pushed by intel.

Multicore processing if anything. Saying its for cell just makes it sound super important for the fan boys.
 
One lucturer at my university that does research on auto vectorisation was not only pimping his own compiler but also IBM's. He seaid that it produced effective code for the VMX units.

Have any of you heard anything more about that?
 
This has NOTHING to do with multiple CPUs/Threads.
Its merely trying to use the SIMD Instructions where possible.
 
Npl said:
This has NOTHING to do with multiple CPUs/Threads.
Its merely trying to use the SIMD Instructions where possible.

The compiler is looking for instruction-level-parallelism, i.e. multi-threading optimised for this and I think that's where the confusion is arising.
 
Jaws said:
Npl said:
This has NOTHING to do with multiple CPUs/Threads.
Its merely trying to use the SIMD Instructions where possible.

The compiler is looking for instruction-level-parallelism, i.e. multi-threading optimised for this and I think that's where the confusion is arising.

you sure you didn't just contribute to the confusion? ;)
 
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