Recent content by Squigs

I don't think this should affect things. Widescreen PAL simply has wider pixels. The horizontal resolution (in terms of pixels across the screen) should be the same. Does anyone know how the signals are transmitted from the sports stadium to the transmitter? Is there an extra...

"Design For Test" is part of the silicon design process. I think the way it works is that there is actually a little extra logic in there that can have certain inputs fed in, and will test every single connection. You don't actually need to testr a complete run. If parts A, B and C work...

The capability to support text mode strikes me as a little outdated, and has done since the 1980's. Even the Amiga was too modern to have an explicit text mode. About the only place it's actually needed is Bios startup and full screen command prompt windows.

Did the Virge at least have Z buffer support? I always felt that this was a major drawback with software renders. A Z-calculate, buffer read, compare and write took up too many cycles to justify in software. Especially when compared with a non textured triangle. I did find it quite nice...

This is the case with the GeForce 3 as well. The Vertex Shader Latency seems to be twice the throughput, so yes, in the case of Vertex shaders, we do see pipelining. Pixel shaders seem to cycle through a batch of fragments and wait for the instruction to be complete on the first one before...

I'd say RISC. Sort of. The instruction length is almost certainly going to be a fixed width internally. Instructions that use two or three registers simply ignore the last parameter. There is no indirect addressing. While we have modifiers, these are consistent accross all instructions...

This is just a guess, but I'd say that using tiles with an IMR is slightly more efficient in terms of cache access. A triangle is more likely to approximate a square thanh a scanline, so the FB memory used is likely to have more contiguous chunks. Do remember that there is quite a deal of...