Recent content by denev2004

Wouldn't that be the way how SnB AVX is organized?

Eh...I don't know where he got the reference about the cores count in Discovery... It seems to be based on this calculation Xeon Phi has a...rather lower frequency?

It appears to be..not

Intel MIC first appear in TOP500 http://i.top500.org/system/177816

I prefer to call it inaccurate..at most occasions

I do have seen reports like this but this can't make sense to me....Still, according to AIDA64's cache test, BD performs badly Or they've got another bottle neck?

Yes, just like the first version of Fermi's whitepaper...

I still can't understand the benefits of designing SP/DP unit seperately..

Japaness website shows that the high temperature of desktop IVY is still due to the silicone grease inside the CPU http://pc.watch.impress.co.jp/docs/column/sebuncha/20120511_532119.html

That's not enough if you're talking about DP. Even talking about SP it's just barely enough...Cos I don't think a 4-core-haswell can went up to 4Ghz

I guess it should be the driver's problem. If you put it in a single computer, than you'd better just use 1~2 GPU(s)

by Charlie Demerjian.......

I guess he means PCI-E 3 X16 has a same power consumption as PCI-E 2.1 X16 does. Which means PCI-E 3 X8 may reduce power?

Probably inner bandwidth is also a factor I guess?

I do want to know the exact reason for this. I think 680 is not that bad on its theoretical performance and 680 has done some improvement in the scheduler according to the post of the Kepler in this form. What change in 680 cause this result? Cache bandwidth I may guess?:roll: