Recent content by AlexV

  1. AlexV

    Intel ARC GPUs, Xe Architecture for dGPUs [2018-2022]

    https://tenor.com/view/mando-way-this-is-the-way-mandalorian-star-wars-gif-18467370
  2. AlexV

    AMD Radeon RDNA2 Navi (RX 6500, 6600, 6700, 6800, 6900 XT)

    Whilst not necessarily ideal, we do expose (and have been exposing) the relevant builtins for a while: https://reviews.llvm.org/D104946. They map directly to the instructions described in 8.2.10 here https://developer.amd.com/wp-content/resources/RDNA2_Shader_ISA_November2020.pdf, and can be...
  3. AlexV

    Nvidia giving free GPU samples to reviewers that follow procedure

    Things have to start somewhere, otherwise you're stuck on a perpetual treadmill of "not yet fast enough". It's not as if we are one HW iteration away from finally getting to 42. Every interesting feature started as "not yet fast enough / not yet flexible enough", wouldn't you agree?
  4. AlexV

    HIP, but now with 100% more CPU support

    Hello B3D denizens. Since I've seen HIP (https://github.com/ROCm-Developer-Tools/HIP) mentioned in passing around these parts (usually in tandem with CUDA), I wanted to let you know that we've just published a HIP CPU RT: https://github.com/ROCm-Developer-Tools/HIP-CPU. As the unimaginative name...
  5. AlexV

    AMD: Navi Speculation, Rumours and Discussion [2019-2020]

    Who would have thought that "organic substrate" was such a literal thing.
  6. AlexV

    Zhaoxin discrete GPU

    VIA and HTC are not really independent entities, are they? IIRC it was more a case of moving assets / IP around to guard HTC against litigation.
  7. AlexV

    AMD Vega 10, Vega 11, Vega 12 and Vega 20 Rumors and Discussion

    OpenCL Pixel Shaders? I understand that these missing features are legion, but I don't think that a rewrite of the OpenCL spec was ever advertised...
  8. AlexV

    AMD Vega 10, Vega 11, Vega 12 and Vega 20 Rumors and Discussion

    This may be of interest, apologies if already posted: http://developer.amd.com/wordpress/media/2013/12/Vega_Shader_ISA_28July2017.pdf.
  9. AlexV

    AMD RyZen CPU Architecture for 2017

    I believe that does not quite address whether or not Epyc is affected, given that the poster on RWT only has access to a consumer Ryzen SKU - please correct me if I am wrong.
  10. AlexV

    AMD: Navi Speculation, Rumours and Discussion [2017-2018]

    I'm not entirely sure that it is so desirable to have mutant cancerous ISAs that grow new instructions whenever given a chance and change or remove old ones on a whim. Adding without ever removing as a non-mutant alternative may be of interest, but people scream bloody murder about x86 all the time.
  11. AlexV

    AMD RyZen CPU Architecture for 2017

    Yes.
  12. AlexV

    AMD RyZen CPU Architecture for 2017

    Apologies, I misread! Having said that, the underlying idea is still valid, I think: you can do single-pass prefix sums without DS_ORDERED_COUNT, in a relatively portable fashion, using only API level primitives, with a minimal extra space. Which while interesting is probably out of scope for...
  13. AlexV

    AMD RyZen CPU Architecture for 2017

    This can be done now, without DCAS support at the cost of some extra storage (not a ton of it though).
  14. AlexV

    AMD RyZen CPU Architecture for 2017

    I think that TSX might be less impressive than assumed in the scenarios that are typically of interest on this forum,. For example, software in this neck of the woods would have probably already migrated to a somewhat granular locking policy...or at least one would hope so. In general, one would...
Back
Top