Xbox 360 details @ CEDEC 2005

[one]

Zenji Nishikawa and Hiroshige Goto have uploaded their reports about the Xbox 360 session at CEDEC 2005 in Tokyo as they could somehow get permission to publish what they heard at the NDA-based session.

Zenji Nishikawa article @ Mycom PC Web (6 pages article)
http://pcweb.mycom.co.jp/articles/2005/09/09/cedec1/

Hiroshige Goto article @ Impress PC Watch
http://pc.watch.impress.co.jp/docs/2005/0909/kaigai210.htm

Goto's main focus is on Xbox 360 CPU and the comparison with Cell PPE with their pipeline diagrams (PPE's contains many guesswork by him). His conclusion is just they are very alike, though the pipeline length is different between these 2 and the organization of the PPE vector/scalar pipelines are unknown. Anyway it seems it doesn't give us a clue about the recent Crytek comment about Xbox 360 CPU/PPE.

While Goto does interesting speculation as always, Nishikawa does fact-oriented, very detailed report and description about the session.

Here's a summary of revelations/semi-revelations that could be gleaned from those 2 article about Xbox 360:

+ Among 3 cores in Xbox 360 CPU (codenamed "PX"), Core 0 is primary and Core 1/2 are secondary. Core 0 is fully usable by a game program. Core 1 and Core 2 are shared by a game program and the Xbox 360 system. Network stacks, services, drivers such as a USB driver run on those secondary cores. 5% computation usage of both core 1 and core 2 are reserved by the system.

+ The XMA (modified WMAPro) decoder in the southbridge chip can decode 256 XMA channels at the same time. Though the compression rate is variable, 1/8 is just enough for typical usage. After decoding, all software sound processing (multi-channel mixing, 3D surround sound, Dolby Pro Logic II/Dolby Digital 5.1 encoding) are done on CPU Core 2. When it processes 256 channels at the same time it costs 25% load of Core 2.

+ A hardware-assisted tile-rendering method called 'Predicated Tiling' is supplied as a library for Xbox 360 for the case when 10MB eDRAM is not sufficient, for example 64bit (FP16 * RGBA) HDR rendering + Z buffer + MRT in 720p. While it affects geometry processing with 1.2 - 1.3 times load, it doesn't affect pixel processing as there's no overlapping unlike geometry. As the result, it doesn't affect the total performance as pixel processing load is inherently larger than that of geometry.

+ The hardware tesselator in Xenos supports both adaptive and sequential, and adaptive tesselation requires 2-pass. If the tesselator is used the vertex output from it is limited to 1 vertex per clock though the performance impact can be mitigated as output vertices from the tesselator have higher locality for better caching.

+ In a double-layer DVD for Xbox 360, 7GB is usable by a game. The transfer rate of the DVD drive is 15MB/sec max, 10-12MB/sec average. The seek time is 115ms, switching layers takes 75ms. Loading 512MB data takes 34 seconds.

+ 2GB in the HDD is used for a temporary cache area for games. Its average transfer rate is 17MB/sec and the average seek time is 13ms.

+ Game data is managed per user account and saved in HDD, but 64MB Memory Unit is also usable for checkout/backup. The Memory Unit slot is 2.5MB/sec write, 8MB/sec read.

+ In its 512MB RAM, 32MB is allocated for the system. The RAM is GDDR3 SDRAM @ 700MHz (22.4GB/sec).

 

[[maven]]

Where did you get the translation? It looks like interesting info, thanks.

Incidentally, I "guessed" similar values for OS CPU and memory usage and here, yesterday...

 

[one]

Where did you get the translation?

It's homebrew

BTW, Goto also speculates the Xbox 360 CPU FSB to GPU link uses some special serial technology (5.4Gbps per pin) by looking at the FSB (16 differential pairs per upside/downside without equal-lengthwiring) in the motherboard pic that was recently leaked on the web. Does anyone know what it actually is?

 

[Guden Oden]

one,
There may be more differential bitpairs on the inner layers of the mobo (and there likely is). I was wondering myself if it perhaps was PCIe that was being used. After all, there's a PCIe controller in xenos for hooking up with the southbridge... Then again, I don't know what bus the IBM G5 uses, as it too has a bidirectional bus that is very fast (bandwidth wise). It might be that interface that is used, just sped up a bit.

Anyway, great post, great infos! Thanks A LOT! I bumped your rep even though you've hidden it.

 

[Titanio]

Thank you very much one! Some interesting stuff in there. Directly answers some of my questions about OS resources in my other thread, as far as X360 goes at least

 

[Carl B]

One, as always your translations are the ones that count. Great summary!

 

[silhouette]

Great info... Thanks a lot for the summary

 

[Jawed]

If you compare the pipeline lengths of integer instructions in Cell PPE and Xenon they both come to 23 cycles - with the duration of instruction fetches, buffering, decodes and register fetches all pretty much the same. The overall length of the integer pipeline is determined by branching.

The major difference comes in the number of stages for executing integer load/store or general instructions, which seem to be longer on Cell But Cell PPE and Xenon both have the same pipeline length for integer instructions, in the end.

----

VMX instructions go through an instruction queue and dependency check, which allows VMX instructions to be dynamically re-ordered, page 7/16 (description of Cell PPE VMX, which also has a VMX instruction queue) - pagination is a bit broken, end of first paragraph on "page 595":

http://researchweb.watson.ibm.com/journal/rd/494/kahle.pdfhttp://researchweb.watson.ibm.com/journal/rd/494/kahle.html

Anyway, I can't find anything in these articles that explicitly describes the difference between the VMX in Cell PPE and Xenon. All we seem to have is 32 versus 128 registers, respectively and a dot-product pipeline in Xenon.

Jawed

 

[Qroach]

Excellent post! There's some good information there...

 

[compres]

It does not seem to be such a bitch to program as many members of this forum have said before, and besides arent MS developer tools quite mature already?

 

[ralexand]

"The hardware tesselator in Xenos supports both adaptive and sequential, and adaptive tesselation requires 2-pass. If the tesselator is used the vertex output from it is limited to 1 vertex per clock though the performance impact can be mitigated as output vertices from the tesselator have higher locality for better caching."

Can someone talk about what that would be used for and what it means for games?

 

[DeanoC]

"The hardware tesselator in Xenos supports both adaptive and sequential, and adaptive tesselation requires 2-pass. If the tesselator is used the vertex output from it is limited to 1 vertex per clock though the performance impact can be mitigated as output vertices from the tesselator have higher locality for better caching."

Can someone talk about what that would be used for and what it means for games?

The tesselator is pre-shader execution, so if you want to run a program for adaptive tesselation (say distance from the camera), you need to do 2 passes, once producing the tesselation factors, the other doing the actual tesselation. This is fairly trivial and fast for Xe because of memexport.

 

[ralexand]

The tesselator is pre-shader execution, so if you want to run a program for adaptive tesselation (say distance from the camera), you need to do 2 passes, once producing the tesselation factors, the other doing the actual tesselation. This is fairly trivial and fast for Xe because of memexport.

Thanks, so its just a way of doing LOD.

 

[therealskywolf]

Wow. 32 mb? Isnt that a bit too much? Thats half of what the Xbox 1 has. Why the hell do they need so much?

 

[Inane_Dork]

Wow. 32 mb? Isnt that a bit too much? Thats half of what the Xbox 1 has. Why the hell do they need so much?

Well, MS reduced the TCR's by 75% or something like that, so it's not too unreasonable to expect that 32 MB of RAM be reserved for the automatic handling.

My Google skills are weak, but I somehow recall the PS3 reserving 64 MB for whatever it needs. Combined with AA render targets not taking up more RAM than non-AA render targets, it would seem the X360 has possible a sizable RAM advantage over the PS3.

 

[Titanio]

My Google skills are weak, but I somehow recall the PS3 reserving 64 MB for whatever it needs

Reserved RAM is a given on PS3, of course, but I haven't even heard rumours of specific figures, let alone any credible info to that effect. Can you remember where that was reported?

 

[Squeak]

A cut down XP with extreme DRM and resident live, seems more likely to be a space hog than the trimmed Linux or whatever Sony is using.

 

[scooby_dooby]

Except it's a cut-down windows 2000 OS, not XP

edit - it's actually a modifed XBOX OS, which was a cut-down win2000 OS. So it's like a 2nd derivitive of win2000.

 

[Inane_Dork]

Reserved RAM is a given on PS3, of course, but I haven't even heard rumours of specific figures, let alone any credible info to that effect. Can you remember where that was reported?

Unfortunately not. I wish I did, though. I seem to recall reading it.

EDIT: Nevermind. I remembered it from... a source I shouldn't have repeated. Treat as rumor.

 

[Mefisutoferesu]

Come now... we're all going to think you're privy to some information we're all not. Wouldn't it have been better to say, "nevermind, must've been my imagination." Lie or not, it would have sealed up any people from running around and having them say "I heard from a very reliable source..."