TSMC: 32nm in 4Q09, 40nm half-node confirmed

Discussion in 'Architecture and Products' started by B3D News, Jun 1, 2007.

  1. B3D News

    B3D News Beyond3D News
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    According to Digitimes, TSMC is currently hoping to unveil their 32nm process in Q4 2009, which is approximately 24 months after the 45nm process that will become available in September of this year, and roughly as expected by Moore's Law. This is unlike the 45nm and 65nm transitions, where TSMC reduced the gap with IDMs (Integrated Device Manufacturers) such as Intel, IBM and Texas Instruments.

    Read the full news item
     
  2. Geeforcer

    Geeforcer Harmlessly Evil
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    First, isn't this the wrong forum for this? Seems like a better fit for the "Industry".

    Second, the gap between foundries and fab'ed IDMs is one of the reasons why AMD can absolutely not afford to go fabless.
     
  3. Arun

    Arun Unknown.
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    It arguably is more suitable to 3D Industry, but I thought it might be able to start some interesting discussion here (worth a shot...) and that the Industry forum is a bit crowded right now with a bunch of new threads, heh.
     
  4. Rangers

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    And why Intel will have a huge advantage when they enter the graphics market.

    What I'm wondering is, what the heck the console makers are going to do next time around. Say they launch in 2012, that'll leave what, one die shrink left? How do you reduce costs?
     
  5. Arun

    Arun Unknown.
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    I'm not sure there is any intrinsic reason why Chartered couldn't ramp at the same time/rate as AMD though, since they have the same tech sharing agreements. But fabless would be far from desirable from a cost or clockspeed point of view, definitely. You can compete in the value segment by being fabless, but tough luck if you're hoping to compete anywhere else IMO. Well, I guess the exception there might be if your foundry is IBM itself...

    Well, the long-term gap between mass-market chips available at TSMC on a given process node and the first Intel chips available tends to be about 12 months nowadays, which could be worse. So what you've really got is the TSMC half-node fighting Intel's next-gen node. A major question also is whether Intel's process would be 'ready enough' for a 250mm2 chip in that timeframe. With proper redundancy mechanisms, I would tend to believe so, however.

    Let us not presume the death of Moore's Law so soon, shall we? There are plenty of more exotic ways to scale further. The only reason question in my mind is if they can be made economically viable. Also, continuing to scale every 2 years might not be a good long-term strategy, if the R&D costs go up and many current applications wouldn't benefit from 16x+ the number of transistors. GPUs, FPGAs and even many-core DSPs could continue to benefit for decades to come. But many other industries might not benefit as much...
     
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