Toshiba's reengineered Cell SPU

one

Unruly Member
Veteran
On June 14th Toshiba did this presentation at 2007 VLSI Symposia.
http://www.vlsisymposium.org/circuits/cir_abstract/5-4.htm
http://www.vlsisymposium.org/circuits/technical.html
Session 5-4

A Design Methodology Realize an Over GHz
Synthesizable Streaming Processing Unit

Abstract
A 7.07mm2 synthesizable Streaming Processing Unit (SPU) is fabricated in a 65nm CMOS technology with 8 level copper layers which is migrated from its original custom design to a synthesizable design to get higher design portability with small performance reduction. The logic area is 20% smaller in addition to process scaling factor. Correct functional operation is realized at frequencies 4GHz, 1.4V

According to Tech-On report, this automatically compiled/designed version is 30% smaller than the original SPU but 10% slower. The 4Ghz clockspeed seems unusually high for this kind of synthesizable chip.
 

Shifty Geezer

uber-Troll!
Moderator
Legend
That's all very well and good, but when in the blazes are Toshiba going to use these Cell processors they've spent years working on in any products?!
 

patsu

Legend
I remember reading on the cbe-oss-dev mailing list that Celleb (Toshiba's Cell reference platform) was rolled into kernel 2.6.20 2 months ago. So hopefully it's close... 1 more year ? :p
 
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