Toshiba's reengineered Cell SPU

Discussion in 'CellPerformance@B3D' started by one, Jun 16, 2007.

  1. one

    one Unruly Member
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    On June 14th Toshiba did this presentation at 2007 VLSI Symposia.
    http://www.vlsisymposium.org/circuits/cir_abstract/5-4.htm
    http://www.vlsisymposium.org/circuits/technical.html
    According to Tech-On report, this automatically compiled/designed version is 30% smaller than the original SPU but 10% slower. The 4Ghz clockspeed seems unusually high for this kind of synthesizable chip.
     
    #1 one, Jun 16, 2007
  2. Shifty Geezer

    Shifty Geezer uber-Troll!
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    That's all very well and good, but when in the blazes are Toshiba going to use these Cell processors they've spent years working on in any products?!
     
    #2 Shifty Geezer, Jun 16, 2007
  3. patsu

    patsu
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    I remember reading on the cbe-oss-dev mailing list that Celleb (Toshiba's Cell reference platform) was rolled into kernel 2.6.20 2 months ago. So hopefully it's close... 1 more year ? :p
     
    #3 patsu, Jun 16, 2007
  4. Farid

    Farid Artist formely known as Vysez
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    #4 Farid, Jun 16, 2007
  5. abi.allan

    abi.allan
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    cool links
    :smile:
     
    #5 abi.allan, Oct 31, 2008
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