It depends on the brand of chip. A Micron "512gbit" is actually using a block size of 2048k+112k for wear leveling area, bad block remapping.
(old datasheet, but to illustrate)
• Organization
– Page size x8: 8640 bytes (8192 + 448 bytes)
– Block size: 256 pages (2048K + 112K bytes)
– Plane size: 2 planes x 2048 blocks per plane
It needs 12 chips to fill up the 12 channels, so it's obviously using 512gb chips ending up at exactly 825. There are no other possible configuration from any nand vendor.
512x1024x1024x1024 x12 /8 = 825G