The ATI R600 Rumours & Speculation Centrum

And where did that get nVidia? Have you ever seen a shader replacement done even with Cat AI that wasn't noticable, to what ever degree? Now I have to say shaders arn't the only things done by graphics cards ya know. There are other things in the engine that require the GPU.

 

Only when amd paper launch the card, personaly i'm bored with ati paper launches (x1650xt/x1950pro), most of the users not want paper launch anymore, few hundred card (nv strategy, and call this as hard launch) is still better than cards to reviewers only.

 

Actually Dave Orton offers the 96 number here but never mentions the R-600 himself. Just offering this for the few that may want to here it from his own mouth instead of words in a post.



http://ati.amd.com/companyinfo/events/StreamComputing/index.html

Edit: corrected link!

 

Point being, NVIDIA had access to the engines/games shaders without needing the engine code. They could have optimized for the shader in their driver or they could have gone to the ISV and suggested optimizations. They did not have to see one line of engine/game code.

And which of those things would ATi need the engine/game code for? Why would they need the code if the information is already available when it gets to the driver (why make it harder for themselves)?

 

Could be the kind of optimization that Humus did for Doom3?

Edit : http://www.beyond3d.com/forum/showthread.php?t=12732&highlight=doom3

 

Why would ATI be upset? Well, I might guess at a few things:
1. nVidia's use of scalar units.
2. nVidia's high dynamic branching performance.
3. nVidia lacks some features that ATI thought would be really important for DX10.

 

Firstly it takes quite a bit of time to do shader replacement without the code, it takes man hours and alot of testing before hand. With the code it will cut down work significantly. Humus's tweak came out how many months after D3 was released? And I think it was actually modified after ATi put it into Cat Ai as well. Also the output of the specular highlights were different with the shader replacement, not saying its not good, just different, it was actually more accurate, but in some cases it might go the other way.

Depends on what the optimizations are for some shaders require some heavy work at the backend of an engine. This is why I'm saying its not always the shaders themselves.

 

Is that a generic hypothetical, or do you have some candidates in mind for that one?

 

sorry, I should have said vec4 instead of complex shader. I've read others use the term 'complex' with regard to R600's vec4 vs. G80's scalar so it was on the tip of my fingers...

Since everyone seems to agree that the only reference to 96 vec4 shaders was an executive's ramblings, 64 is more believable than 96 at this point...?

 

The code is there in one form or another. Engine/Game loads shaders, sends those to the drivers and the drivers compile the shaders to the internal hardware instruction set. You have access to the shader code in the drivers. You will also have access to all the vertex attributes and textures bound when the shader is used.

True if another method/algorithm works better on the IHV's hardware then they would suggest that to the ISV. The IHV's developers wouldn't go into the code base and start modifing the engine themselves, unless they are specifically hired to do so.

A good material/shader centric engine should not require "heavy" work to change a shader...

btw, it also takes some time to become familiar with the architecture of an engine.

 

I think you won't get consensus on that. If you take Inq's 720M transistors seriously (yes, I said "Inq" and "seriously" in the same sentence --but then we're starting to get into a timeframe where they might actually have a bit of information rather than just shotgunning into the dark), then what's taking up all those transistors? Given Xenos transistor count at 48 shaders + EDRAM is less than 1/2 that.

Personally, 64/80/96. . none of the three would really surprise me, but if you put me against the wall right now I'm leaning marginally towards 64 and scratching my head over transistor count/die size.

 

Hmm, I wasn't thinking straight...

RV570 has 3 quads of TMUs and 3 quads of ROPs, but it has 4 ring stops.

So in R5xx the ROPs seem to be writing data to multiple ring stops, not just the one they are "attached to".

Another thing, that comes out of the CTM documentation, is that it's possible for a pixel-shader to write to any part of the render target (this is "scatter"). This effectively works outside of the constraint of "screen-space tiling".

Jawed

 

1. Orton
2. some sources told, that R600 is similar to Xenos*2 in some ways
3. die-size, transistor count (Xenos = 48 vec4 ALUs = 230M; R600 = 720M)
4. required performance

/edit: geo was faster

 

4. nVidia has [great perfromance in] some feature that ATI thought wouldn't be really important for DX10.

 

Have you programmed engines before? because its almost impossible to make an engine that is future oreinted in ever regard, to tell you the truth because the way Dx is or has been, engines don't last for more then a year before they need heavy modifications with upcoming versions of Dx.

Even in Ogl there are times when an engine (although not a sever as Dx) just has to be built from ground up because of the same reasons.

As good as an engine is its impossible to circumvent the API's limitations and changes, If that wasn't the case Unreal engine, Cry Engine 1 and 2, Lithtech, and NDL (gamebyro), they all didn't need to go through major changes and million's of dollars to get to where they are now. Ask any engine programmer out there, how many times they had to rewrite an engine from ground up or close to ground up. Its common, engines don't cost hundreds of thousands of dollars if they could be reused for 5 years.

Developers go into the engine quite a bit not to mention they can give permission to an ISV for help with certain features with out hiring the IHV's programmers because thats the way the dev programs are set up, "income" in this case is the work done and marketing that is gained from both parties.

One example Cry engine didn't have a MRT's when it was first made, so glow effects weren't easy to put in, so we had to go into the engine and make so heavy changes to the core, which we got help from nV and ATi . Its not uncommon for them to help because if the product comes out and comes out good, it helps them at the end to sell cards.

 

Not sure if this has already been brought up but

"Not many are even aware that the 360’s GPU has the exact same number of pipelines as ATI’s unreleased R600, but to keep costs down and to make the GPU easier to manufacture, Microsoft chose to disable one of the shader arrays containing 16 pipelines."

Source http://dpad.gotfrag.com/portal/story/35372/?spage=9

 

Generic hypothetical.

 

They've got 48 in 230 some million transistor in Xenos, I'll be highly disapointed if 64 is all they can get into 720m in R600.

Hell even 96 seems light in that light. Even knowing that the support structure could be much larger on R600.

 

Maybe my memory is fuzzy, I thought the 230M didnt include ROPS and certain other functions. Plus the fact that Xenos wasn't "fully" DX10 complaint.

 

It doesn't, which is why I said Xenos + EDRAM is still less than 1/2 of 720M upstream. . .because the ROPs are in that EDRAM daughter die. I never remember the exact number, but it is less than 360M anyway.

And sure, re DX10. Still an awful lot of transistors tho.