Speculation: PS3, the two SKUs and PCB design

[Tars Tarkus]

There's been a lot of debate about why Sony chose to go with two versions of the PS3. Mostly this has centered on the steep BOM. While components are inarguably the lions share of any electronic device's cost it only tells part of the story. Those parts have to be put on a board, connected to power and ground and to each other as necessary. As someone who's had to do layout, trace verification, Gerber file generation for the fab etc. I can tell you it's a non-trivial task. A good toolset will help enormously but it is something that unavoidably takes a large chunk of resources. Board design for something with the complexity of the PS3 and the space limitations inherent in a console design must have been a Herculean task. Luckily for Sony this is an area with which they have vast experience. With that in mind I looked again at the differences in the two models and something clicked. All the things stripped out of the base model were I/O related. Click. Two boards for PS3. One board with Cell, RSX, and memory. Another with the wi/fi, card reader, HDMI etc. Why would they do this? Simplicity. They know when they get a process shrink for Cell and RSX that they will have to redesign that board for a variety of reasons. Seperating the logic and components that don't need to be a part of that redesign makes the process a good deal easier. They can happily crank out the daughter card irregardless of main board design, populating it with whatever things they need for the particular SKU its destined for. Process shrinks become much easier and less costly to implement on the PCB level while volume efficiencies continue to apply regardless of die shrinks for the life of the daughter card. This also opens an interesting possibility when they do the "Slimline" version of PS3 six years or so down the road. Merge the boards and the SKUs at the same time extending the platforms viability for a while in the face of a competitors next-gen offering. The two board solution also allows a good deal of price flexibility. Depending on cost reductions, the desirability of the flagships extras and the intensity of competition they could price things from $349 base/$549 flagship, $399 base/$499 flagship etc. etc.
Anyways, all speculation as I don't have access to any schematics or insider information but it struck me that perhaps someone on this board might find it interesting. Apologies if its a bit rambling or incoherent I've been working long sometimes odd hours lately

 

[NANOTEC]

Why not just design the board with modular sockets?

 

[DemoCoder]

1) it's more expensive
2) it's another thing that can wrong
3) it would probably invite easy modchip insertion. I can see it now. Plugin a new "third party" HDCP chip (probably FPGA daughercard) which disables HDCP and let's you rip BluRay movies. Sure, surface mounting doesn't stop determined people, but it sure the hell makes modding alot harder. Witness how easy it was to mod the XBox1 vs the PS2.

 

[Tars Tarkus]

I hadn't even thought about mod chips though I'm sure Sony did. My concerns were simply maintaining signal integrity, lowering the layer count of the board etc. Having a smaller total number of traces with less density helps on both those counts. As for piracy concerns it struck me as a bit fishy when they originally announced that they were going with seven functional SPEs for yield reasons. It came to mind that the eighth was going to be there but "masked" from the devs because it was intended for real time DRM. Their more recent announcement that one of the SPEs was being reserved for "OS" functions seems to indicate that I may have been wrong on the yield concerns but not entirely off with the concept.