Semiconductor photolithography, how can they keep improving the process?

Squeak

Veteran
Photolithography is the main driving force behind the computer industry.
Sure, software, new architectures and larger harddrives etc. also play their part in pushing the envelope but it is the improvements in lithography that really marks the big steps in performance.

I wonder, if you could send a fabbing plant back in time to say, 1975, and then put some top engineers on the task of making a computer with, the then current techniques, but with the new fab, would they not arrive at a result pretty close, power wise to the current state of the art?

It seems incredible that they can keep improving the process after so many years (semiconductors have been made since the yearly 60s) and with such regularity (every 18 months double up the transistors).

Considering how all important the subject is, it seems weird that it isn’t discussed more in-depth on boards such as this.

Some of the things I would like to know more about is:
What are some of the milestones (new techniques) in photolithography over the years?
What breakthroughs has allowed the jump to 90nm and soon 65nm?
Experimental new techniques that could dramatically improve the process.
 
Funny, I'm taking a course that deals with all these questions. :p

What are some of the milestones (new techniques) in photolithography over the years?

Photon-based, electron beam, ion beam lithography

Experimental new techniques that could dramatically improve the process.

Relatively new? Micro-contact printing, nanoimprinting, scanned probe, dip-pen lithography.


*text book answers from a year ago. I guess they didn't bother updating it :p
 
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As anything else, the tools improve, researchers try out different new mixtures of materials, new chemical processes which enable the cration of new materials, better optics, "new" stuff like SOI etc. Just your very old trial and error stuff, backed by research.

I've been out of the chip business since 3-4 years, but I guess the principles are still the same :)

Some literature for you, if you're really that interested:
one
two
three

Should be a good start for a novice.
 
But it's still the basically the same old photoresist-mask-light-etching thing?
Methods like writing directly on the die with either electron beams or laser, seem to have been under way for ages. I once read a electronics book from the early seventies, where they discussed just that FFS!

Isn't Mores law a self fulfilling prophecy that maybe in some cases hold as much back as it at other times pushes things forward?
I mean, isn't just improving endlessly on the same basic technology both dangerous (risk taking competitors could overtake you) and lazy?
Maybe we could have had far greater computing power if semiconductor companies where a bit more willing to actually try out some of the technologies they've had on the backburner for many years?
 
Well, I don't buy that. Bear in mind that this industry has always been pretty highly competitive. If it was that easy to leap forward, and just one company had done it, then they would have gotten a tremendous portion of the market very, very quickly.

That said, we're fast approaching the limits of what silicon-based semiconductor products can bring us. Regardless of the lithography technologies, the transistors will start to behave very differently if you reduce them in size much more (minimum size is about 10nm).
 
Squeak said:
But it's still the basically the same old photoresist-mask-light-etching thing?

yeah, "basically" :rolleyes: ;)

It's been a difficult journey to sub 100nm, and it will just get worse with the quantum effects to which Chalnoth is referring.
 
Squeak said:
Maybe we could have had far greater computing power if semiconductor companies where a bit more willing to actually try out some of the technologies they've had on the backburner for many years?

Well, the thing is that those backburner technologies aren't really going to hit mass manufacturing feasibility or they just aren't good enough for making tens of millions of transistors while having useful functions. Keep in mind, that memory has one of the highest ( or maybe, the highest) density of transistors on the market, and that's pretty much due to the repetitive nature of the cells. Not much functionality other than storage though. :p

Research into Self-Assembled Molecules (via chemical reactions) is on-going, but the applications thus far are geared more towards sensing devices for...whatever you want to sense really. CPUs are just a long way off for this should this even be a viable path.

edit: actually, the replicative nature of SAM would be useful for magnetic data storage media, particularly because one can create nanometer-sized channel.

But I digress... :p

Direct-Write technologies... multiple writers at a time would be the solution, but controlling each of those to work on one chip would be...quite something, especially if we're looking at just reducing the size of a current 110-million-transistor-CPU. There would be issues with multiple writers anyway because of the very short distance required between the electron beam source and the resist. And then there's the time factor...

Actually, I'm not sure how the quartz crystal oscillator would function at such a tiny size (~10nm for EBL) with quantum effects kicking in.
 
The only direct write system I read about of which is scalable to a usefull degree would be one which used a plane of zone lenses to convert an image formed by a DLP to dots ... but even then compared to the massive parallelism of photolitography it's just a drop in the bucket. Only embossing seems a real alternative.
 
This is really interesting so between 3-5 years we will be hitting the physical limits of the current technologies, and it will be time for revolution again.
 
yes the quantum effects bite us. Leakage current is increasing as we shrink process, that's part of why the 90nm Prescott is so HOT.

Squeak said:
But it's still the basically the same old photoresist-mask-light-etching thing?
Methods like writing directly on the die with either electron beams or laser, seem to have been under way for ages. I once read a electronics book from the early seventies, where they discussed just that FFS!

Electron beams are used to make the mask.
As Mfa says, the photolithography is massive parallelism. Making the chips using the electron beam technique would be very slow, low volume and thus very expensive.. kind of like the masks we use ?!
 
Chalnoth said:
Well, I don't buy that. Bear in mind that this industry has always been pretty highly competitive. If it was that easy to leap forward, and just one company had done it, then they would have gotten a tremendous portion of the market very, very quickly.

That said, we're fast approaching the limits of what silicon-based semiconductor products can bring us. Regardless of the lithography technologies, the transistors will start to behave very differently if you reduce them in size much more (minimum size is about 10nm).

The solution to the wall is to make each transistor switch faster ie increasing clock speeds and using fiber optics instead of metal traces.
 
NANOTEC said:
The solution to the wall is to make each transistor switch faster ie increasing clock speeds and using fiber optics instead of metal traces.
Well, fiber optics is a solution for communication between chips, but isn't much of a solution for the majority of on-chip communication. And increasing clockspeeds also increases heat: power consumption is going to be a tremendous limitation soon.

So no, neither is a solution to the problem of being unable to shrink silicon processes down past about 30nm.
 
Chalnoth said:
Well, fiber optics is a solution for communication between chips, but isn't much of a solution for the majority of on-chip communication. And increasing clockspeeds also increases heat: power consumption is going to be a tremendous limitation soon.

So no, neither is a solution to the problem of being unable to shrink silicon processes down past about 30nm.

That where superconductors come in.:p
 
I don't think superconductors would be useful for reducing the heat produced in a chip. The resistance of the wire lines is a very minor issue compared to others.
 
Chalnoth said:
I don't think superconductors would be useful for reducing the heat produced in a chip. The resistance of the wire lines is a very minor issue compared to others.

Heat in electrical circuits are caused by resistance to electron flow no?
 
NANOTEC said:
Heat in electrical circuits are caused by resistance to electron flow no?
Ah, but circuits aren't just wires. Especially integrated circuits, where most of the resistance comes from the current flowing through the semiconductor itself. Then you have power loss due to transistor switching. And then you have power loss due to current leakage between neighboring conductive lines. And then you have power loss due to current leakage through the oxide layer between the gate and the rest of the transistor.

In other words, you'd only be solving one small portion of the problem by moving to superconductors, even if it were feasible to do so (with currently-known superconductors it's not).
 
Superconductor chips aren't free in terms of power draw. The standard way to represent a '1' bit in superconductor technology is IIRC a bit of current running in a loop, and logic operations are carried out by either moving the current between loops or discharging it; the latter causes production of heat. Also, superconductors still have the problem that they require extremely low temperatures to function correctly; a steady supply of Liquid Nitrogen is rather costly compared to the simple heatsink/fan you would place on top of a silicon chip. However, if you can provide Liquid Nitrogen or otherwise solve the cooling issue, you can obtain chips in the hundreds-of-gigahertz range today.
 
The name is RSFQ ... unfortunately all superconducting computing research seems to have moved into the nebulous/unpractical realms of quantum computing instead. Maybe RSFQ research just went underground/military?
 
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