RDRAM inside the N64

Following the purchase of an almost immaculate N64, I've renewed my interest in this little console. We know a lot about the CPU and the RCP. The Rambus memories in it, however remains a rather undeveloped subject. Even in the retro-modding forums all the info I could gather is that they are not tolerant to overclock and that, apparently, the N64 can 'recognize' up to 16Mbytes automatically at boot.

Apparently, Nintendo used in the N64 an early version of Rambus RDRAM made by NEC: the uPD488170L. It's a 16+2 Mbit chip with a 9 bit datapath, 250MHz double data rate bus. There were two of these chips in a N64 and they were daisy chained. (On a side note, I found out that there was even an earlier version of this chip with a voltage supply of 5V and realized in 1992!). 16/18Mbit RDRAM was all you could buy in 1996/7 and they were used also in some VGAs of the period (Cirrus Logic Laguna, a version of Chromatic Research MPACT!, SGI workstation cards...).

Some N64 units had these chips marked as "Nintendo RAMBUS18-NUS" but there are also motherboards using chips with the true name of the manufacturer (NEC) and the product code.

Sometime in 1998, Nintendo switched to a single 32/36 Mbit chip (the extra 'Mbits' are available for parity). One of these chips was also included in the 'expansion pak', the little plastic cartridge that was required to use 'hi res' graphics (640x480 vs 320x240) in certain games. Unlike the early 16/18Mbits memories, there is absolutely no info about this chip. The info I could gather is that these appear to be tolerant to overclock possibly being PC600 class. All the major RDRAM manufacturers started to supply PC600 64/72Mbits chips realized with a 0.25u process in 1998 but I couldn't find a single source or datasheet on a 32/36mbit variety. These chips still shows up from time to time from Chinese sources with Nintendo markings. Are they leftovers or removed from board? The fact that some surplus stock still exists after all these years is fascinating... Anyway, some people successfully replaced the two 16/18Mbit chips inside the early units with a pair of these to have an 8MB console. Adding an expansion pak brings the total amount of memory to 12MB and the memory controller is still able to recognize all of them (some say up to 16MB are recognized by virtue of using certain expansion paks with room for 2 chips). Of course no game uses more than 8MB at a time, but it's a nice discovery that the N64 could have been developed into an even more powerful console. Image in it had launched with 16MB of RAM! Cartrdige space would have still been a problem but the extra memory could have been used for procedurally generated content (ie pre computed animations... the geometry processor inside the RCP sometimes was not able to cope with everything being thrown at it).

By the way, in somebody finds a datasheet for this chip, it would be nice of him to share it with me! They are marked RDRAM36-NUS 9937KU653 but this is just a Nintendo internal code, so it's not possible to determine the true manufacturer of said chip.

 

Do you still have it? VGA with MPACT! must be pretty rare nowadays...

Rambus also designed a memory controller using standard libraries to facilitate adoption over a broad range of devices and using different fabs. I don't know if SGI, to save time, used this so called 'Rambus cell' in the RCP resulting in a less than optimal arrangement. On top of that, the VR4300 was a low cost design with a shared address and data bus and had to fight with the graphic processor for bandwidth. Rambus design, at least for the time, was elegant: 13 data lines were all that it was required to have a 500MB/s bus. Owing to that, and to the integration of all functions into the RCP, the N64 motherboard had only two layers. RDRAM was a competitive design in the second half of the '90s and it could have played a bigger role in applications where high bandwidth and low complexity is a plus.

 

I've read several Rambus datasheets and there's nothing on paper that points to above average latency. In fact, Direct Rambus (the first type of RDRAM commercialized, used in SGI workstations and in the N64) includes separate RAS and CAS resources. Theoretically, you could do a framebuffer write and z-bank activation for the next fragment (located somewhere outside the current active page) to be performed almost simultaneously reducing the typical DRAM turn-around time. Of course, this kind of overlapped operation involves having your I/O logic designed around Rambus unique features. If you simply reuse a circuit designed to operate with SDRAMs or SGRAMs and slap on top of it a Rambus interface (most likely what Intel did with its 820 chipset ), you're not going to use it to its fullest, and you're possibly making things worse by adding an extra layer of logic.

I don't have direct experience with Rambus but, at least on paper, it looked like a sound solution... Find me another bus in 1992 that could move data at up to 500MB/s using 13 signal lines (20 if you count shared voltage references and grounds). Of course it's a byte serial interface running at 250MHz double data rate (I believe the first chips where done at 0.65u nodes while those manufactured by NEC for the N64 are 0.45u) so it might have been more complex at the time. Not that designing a wide SDRAM interface is easier. Unlike classic page mode dram, which is a 'dumb' array of cells that can be used in many 'creative' ways (ie Atari ST, Amiga and all those early shared memory, interleaved designs), SDRAM has a lot of control logic onboard. The real advantage is probably a more relaxed timing and less critical operating frequency (When the first 4ns, 250MHz DDR arrived on the market? I think a whole 8 years later Toshiba and NEC sampled the first PC500 RDRAM), a separate address bus (but the pincount and board layers go up...) and of course a more industry friendly approach .

 

You're right. Direct Rambus was the third iteration after Rambus (no other suffix) and Concurrent Rambus

I've a copy of NEC datasheet dated October 1992 where the memory is simply called Rambus. I believe the second and third generation introduced a 16/18 bit bus while the first standard (used in N64) stayed on a 8/9 bit bus.