PS3 internals

Discussion in 'Consoles' started by one, Nov 11, 2006.

  1. nonamer

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    Could be flash RAM, not DDR2 RAM.

    And it would be strange to need memory to do scaling. Existing scaling chips don't use that at all.
     
  2. Carl B

    Carl B Friends call me xbd
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    Well, those were my original thoughts as well - that scaling (if done on this chip) would/could be handled as a straight real-time dynamic stream - but nonetheless a memory buffer does seem to be an integral aspect of the SCC design for some reason. Maybe there's a video 'input' aspect to this console yet... use of the SCC would make more sense in that instance.
     
  3. Npl

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    Am I right that the chip can decode Digital TV? What would be actually needed to enable this functionality except a physical connector?

    I mean being able to record TV with the PS3 would be a big plus.. from a "Media Center" POV atleast.

    also I find 4 USB Ports a bit lacking. doesnt the PS3 have 4x USB front and 2 back ?
     
  4. Mmmkay

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    That memory is 128MB of NAND Flash RAM.

    http://images.dailytech.com/nimage/2999_large_marvell.jpg
    K9F1G08U0A
     
  5. Carl B

    Carl B Friends call me xbd
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    Great cross-referencing Mmmkay. I think it's interesting to note that the Japanese build has a Samsung 625 and the American a Samsung 622. And I guess the adjacent module is still on the table then for being DDR2, although I wish we could read some of the text on it.
     
  6. bobthebub

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    It's an SCEI cxd4302gb, Chipworks couldn't work out what it was.

    Check this out though :- Chipworks PS3 basic product teardown

    Fairly comprehensive list of the main components
     
  7. Mmmkay

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    No probs.

    Unfortunately the other chip is one of those mystery components.

    Chipworks identified the component as CXD4302GB
    http://www.chipworks.com/uploadedFi.../Capabilities/Sony_Playstation_report (2).pdf
     
  8. Carl B

    Carl B Friends call me xbd
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    Thank you for that link, it's awesome!

    Yeah RAM wouldn't bare the Sony label though, so indeed another mystery chip/controller for the pile.
     
  9. Crossbar

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    It would seem a little odd if this mysterious SCC chip or whatever, would handle the scaling of output from the RSX as it is apparent from the PCB that there is a direct connection between the RSX and the Silicon Image chip. Maybe there is more to this but it seems a little bit odd.
     
  10. nonamer

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    http://img.hexus.net/v2/gaming/screenshots/blockdiagram.jpg

    If this is accurate, then video output is directly connected to the RSX, with the "SCC" being merely a southbridge. That's a rather wasteful use though for such a large chip, unless there is someway way to send video data back to the Cell. I can't help but think that they were forced to slap this thing together without fully integrating the parts.
     
  11. bobthebub

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    I think you are probably right (Hence my frankenconsole comment yesterday), if this chip is an SCC it could completely sum up the whole history of the PS3.

    They start out with an elegant all integrated design , XDR, flexio, lots of AV capability, scaling functions etc, then they have to go to Nvidia for RSX, suddenly the scaler can't see the framebuffer, they are left with a big semi-useless southbridge and no time/money/co-operation from Toshiba to replace the southbrige or create a dedicated scaler.

    PS3 ends up late, expensive and lacking in some key functionality.

    I am genuinely wondering whether it might be wise to wait for a 2nd gen machine to see if some of this gets sorted.

    Hope that's all wrong though and they are ironing out the kinks on the scaler as we speak, ready for the euro launch.
     
  12. Carl B

    Carl B Friends call me xbd
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    I think the problem is in viewing the SCC as soley a scaler solution. If its functions include video input, then it makes more sense. If they don't, well we'll just see what the deal is as time goes on... either way the full story eludes us as yet, and there are obviously a lot of plans Sony has for the PS3 beyond what's been revealed so far.
     
  13. bobthebub

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    I don't think we will see video input into the PS3 as anything other than digital data which can come via Gig ethernet or USB, once it's onboard even if SCC could do the decoding cell can as well so it's just duplication of functionality.

    Sony may have had (or may still have) intentions of creating a PSX style PS3 media box where the SCC could come into it's own and there would be obvious benefits in having a common platfom for the two but at the moment it looks like it could be a waste of silicon as the output will still likely be via RSX so a good chunk of the SCC would never be utilised in a PS3 based box.

    Agreed.
     
  14. tuna

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    If it is for video input, maybe it could be for Eyetoy?
     
  15. one

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    That's the E3 2005 spec. The current SKU has 4.
     
  16. Rolf N

    Rolf N Recurring Membmare
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    Wow, that's an ugly hack.
    It's not necessary for Eyetoy software. The PS2 can do Eyetoy games without special hardware in the system, so PS3 Eyetoy software should be perfectly fine with using an SPE or two.

    For purposes of the PS3 this chip is a kludgy interim solution -- it's too big and too expensive to stay in. The PS3 needs a single SATA port, video outs, Networking, USB, a scaler and some LPC interface to read firmware and stuff. That SCC plus extra NIC plus extra TMDS plus extra whatever is expensive overkill and needs to be simplified asap.
     
  17. one

    one Unruly Member
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    I think that RAM interface is for workstations, such as the Cell blade. IIRC the Mercury Cell hardware for military use had a big RAM attached to it and if it's based on the IBM board I think it's likely that it has SCC in it.
    Interesting, but as far as I read the Hot Chips paper for SCC, I don't think it has a scaler function. Probably you saw the page 13 with "Scaling" in the processing steps, but in the page 14 and 15, the actual video processing seems to occur in Cell and SCC only does its job just like a normal southbridge but with higher bandwidth. In the Toshiba 48 MPEG2 streams decoding demo it was Cell that did scaling. Can anybody point me to where it explicitly says SCC has a scaling function?
     
  18. Nesh

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    Thats not very logical though. Someone has to compensate the extra cost of the chip existing in the machine unused even if the marginal cost is lower. Sony is either increasing the cost of the PS3 further increasing their losses with each machine sold, or Toshiba is losing money with each cheapper to produce chip being thrown unused in the PS3.

    Toshiba could have just as well produced the chip in more quantities than needed just to reduce the marginal cost and throw the extra chips in the dump. Thats definetely still a cost without a revenue unless Sony pays them on top for something that is useless. Its no different than implementing in a PS3 and compensate the cost with zero benefit.

    The only way I see this actually being beneficial for them is a very weird behavior of production cost, with total cost being reduced more than the cost of the extra useless/unused chip produced. But that sounds impossible to me.

    There should definetely be some use in it, atleast some inefficient use due to some bad planning and designing the architecture. Otherwise all manufacturers would have increased supply more than demanded to reduce costs
     
  19. Fox5

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    Sony could pay them at or near cost for the chip, thus Toshiba gets to benefit from increased production without suffering losses.
    Or Sony could just have acted like the government and given Toshiba a lucrative contract as a type of pay off.
     
  20. Nesh

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    But isnt that stupid? Paying Toshiba for something useless just to put it in their product?
     
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