Phenom video leaks from Lake Tahoe

Yikes.

He sure was confident though. Good leader/bullshitter. Obviously, at that point, it was not even remotely competing with Clovertown so he was just plain lying or going off some magic projections from engineers who wanted to keep their jobs.

 

He's talking about monolithic quad core and HyperTransport as something that will crush Intel. As much as I like HyperTransport, Intel has managed to squeeze out some stellar performance from the FSB. If it is due tp the advanced caches or whatever, it is still impressive. Intel will go the way of a high-speed interconnect ala HyperTransport with Nehalem, so if AMDs statements about how superiour it is to FSB are true, Nehalem should be the Messiah of Performance.

 

I read a lot of ShaidarHaran's old posts on Rage3D and he was defintely Pro ATi , but he is at least a realist who can still want a company to do well but is not prepared to put his head in the sand. Unlike WaltC who has always been able to paint a black picture very white indeed when it suits what he wants to happen.

I am struggling to see how WaltC thinks that reviewers should not report on what they see but what should happen in the future. They are called "reviewers" because they report back on what they see today. AMD has launched some parts today and paper launched a part as well, so they should comment on what they test today, not what might happen 6 months away. I know AMD likes to do projections on K10 down the line ( they have been doing optimistic projections since spring ) but the future is not cast in stone.

The current Phenom has the following characteristics

1) It has a bug that appears when the speed increases.

2) The energy used goes up greatly when the speed goes up.

3) The L3 cache speed is stuck at the northbridg speed so the chip may not scale well when the delta between cpu speed and northbridge chip gets very large.

4) Most current chips do not clock much past 2.6-2.8GHz.

5) The IPC compared to Intel Core architecture is lower. The abolute speed compared to Intel Core architecture is also lower.

All those things have been reported on, and so they should, by the reviewers. The reviewers job is not to exteapolate and pontificate on how it might all end up. That's a job for us in the forums.

Now, I agree, that things may all end up smlling of roses for K10 but I would not put how K7 and K8 were polished over time as past examples. As other people have mentioned, both K7 and K8 always had very good IPC but had poor speeds. Only the speeds needed to be improved which was done over time ( with the proviso that K8 65nm speeds seem to have problems compared to 90nm). Here we have an IPC deficit and speed issues on a process node of 65nm that AMD have still not got a proven track record on for speed increases and the 65nm K8 has been around for a long time now. So you do have to be very optimistic to think they can rescue this situation.

The above does not even consider what Intel will be doing. The 45nm process looks very good indeed in the next 9-12 months. In Q3/Q4 2008 Nehalem comes out which finally gets rid of all the left over bad bits of architecture from the current Intel chips so should be considered likely to give big improvements again in speed, if they do not have any other issues with this large move. All AMD will have to counter this is a move to 45nm, and considering their move to 65nm has been somewhat rocky it does not breed confidence for this move either.

Even with all this evidence you are still debating when to move to Phenom it seems; I think this tells us more about you than how good Phenom is likely to be.

 

Judging by ATs review, theres not ONE instance that the phenom wins. (compared to its competition at the same price range)

The only thing that seems to be attractive is the 790FX (althoughj the SB700 would be nice), the ability to quad 38x0 series, the new AMD OCing tool and upcoming nforce boards since nVIDIA/AMD chipsets are far superior to that of bug ridden nVIDIA/intel chipset and gives an alternative for all the "SLi" group. But the fact that the CPU itself is weak makes these platforms kind of worthless.

However its a good thing for people with AM2 motherboards looking to upgrade but not wanting to shell out money for a new motherboard, memory etc to jump ship to intel. But just how many nowadays use AM2 setups even down at the low end?

At the end of the day, the launch seems very weak. Almost too weak. It seems like the science project at AMD labs has gone terribly wrong.. now where did i hear that one before

 

I think there are two reasons why FSB is still delivering the goods. First, speed has increased enough so as not to be a major bandwidth bottleneck with dual-channel DDR2. More cache futher improves effective bandwidth.

Secondly, the Core architecture is wonderfully tolerent of latency, because it's very effective at reordering loads and stores. Barcelona added load reordering, but it's done in a naive way compared to Conroe and they still can't reorder stores. Plus, there are some excellent northbridges for the Core 2 Duo, and it's not unthinkable that the memory controllers might be superior to K8/K10's.

The net result of that is memory latency matters much less on Core 2 than on K8, despite the IMC. If you look around, there are benchmarks showing K8's performance improving significantly with lower latency memory, while Core 2 only improves slightly. I couldn't find one in the few minutes I looked, but if you really wanted I'm sure I could find one in a bit more time.

 

Part of that could be that with better latency RAM it only takes less time to move stuff from RAM<->NB, from NB<->CPU things remain the same.

 

Well, you do see an improvement in latency measurements done by memory benchmarks. So it can't be just that - but yeah, it might be contributing too. Advanced load/store reordering is a non-negligible boost to IPC though, I'm sure.

 

Yes, I agree. The Core microarchitecture is very tolerant to latency issues. I think we can all agree that it is a good thing they are moving away from the FSB with the Nehalem, no matter how well the Core 2 performs despite the FSB and latencies.

Do you think the new high-speed interconnect that the Nehalem comes with will be fully utilized or will it only heighten the dependency on low-latency memory? To me it seems kinda silly to bet all your performance on low latency since the trend with the DDR version upgrades has gone with higher latency and higher bandwidth in every revision.

 

Surely lower latency will help but one thing is sure, it can only be better than it is at the moment.

Actually high-speed DDR2 has about the same latency as high-speed DDR1. Higher clock speed compensates higher latency. With DDR3 it will take some while to catch up with high-end DDR2 but it will surely happen.

 

I meant at launch for every revision. The catch-up takes quite a while.

Also, since we are talking about HyperTransport, I would like to see the HTX interconnect being used for GPUs. It gives you a straight connection to the HyperTransport web and, if the HTX standard uses the highest speed HyperTransport, my guess is that it would yield impressive bandwidth.

 

That's nice and all but unless Intel also adopts HyperTransport it would be rather suicidal to switch to HT.

If AMD were in a better cash and marketshare position it could afford to experiment with both PCIE and HT versions of graphics cards.

However, supporting both would be too costly, and supporting only HT would be suicidal.

Also, don't AMD CPUs have a direct feed to system memory completely bypassing the NB? Wasn't that one of the main features when they went to a NUMA architechture and switched to HT? To completely bypass the NB for memory interface...

Regards,
SB

 

For special GPGPU that would be quite nice. For regular GPUs it wouldn't matter for as long as market leaders do not use similar bandwidth connection as developers have to come down to some meaningful common dominator. Also PCIe2 16x offers quite good bandwidth already, I don't see the need for cache coherency in anything but GPGPU solutions.

Yes, they do have.

Yes, it was. With direct memory connection to CPU there is no alternative to NUMA when you have multiple sockets.

Of course when looking at another angle it also means that to access stuff attached through NB you have to go through te CPU that has direct connection to NB.

 

You're the one saying we shouldn't judge until we've seen how Phenom does in the coming months.
I don't think time has ceased flowing over at Intel HQ.
The general rollout of 45nm desktop parts is a few months away.
Intel has already released a 45nm part.

Consider that the overal tenor of most statements and reviews is that AMD is hoping on the mystical B3 stepping should correct some of the errata not corrected by the previous B steppings, then note that this stepping is also a month or more out.

That doesn't reflect on the sorry state of the platform.
You might care about how people "feel" about the warm and fuzzy Phenom, but in truth it's all hard and brittle silicon and cold hard cash.

Thanks to the bargain-basement price of the CPUs, the time Intel has had to saturate a good deal of the market, and that fact that we can't even guarantee that it is safe to overclock past 2.4 GHz until BIOS support is updated throughout the supply chain, the value of selling Phenom products is now severely reduced.

Here's how I suspect those partners feel:
They have outstanding product lines making them no money right now for products they were promised about a quarter ago (already delayed a quarter ago).
They had financial guidance, financial plans, manufacturing and inventory plans all pushed back by months.

They had solid, possibly binding commitments with AMD (which is likely why they didn't delay the launch any further) that AMD is only superficially meeting.
They have solid, possibly binding commitments to customers that they can only superficially meet.

One likely reason why the quality of product is so low is it doesn't seem that AMD seeded its manufacturing partners with fast-running silicon until the very last minute.

That's funny, I recall speeds in excess of 2.8 GHz at launch.

Yes, when running up against a Netburst architecture that was poorly designed for most server workloads, in part because Intel made the mistake of restricting the design target for the processors to the low end to save something for Itanium.

I forget, which one of Intel's designs right now is not competitive?
Is there an expected stretch where Intel will suddenly unlearn the lessons of the last 5 years and go back to producing Prescotts?

I do not think it unreasonable to consider the context of a product's success. Since Intel and AMD sell to the same market, neither can be considered in isolation.

It helps that the product is better, faster, cooler, and cheaper.
AMD should be thanking its lucky stars that FB-DIMMs keep power consumption on the high-end boards too high at idle and only slightly better than AMD at load.

What good is a 2.6 GHz Phenom to me when it won't be stocked until next year?
What good is it when I know that by the time it is available in quantity a far cooler-running chip will be available at the same or better price point?

Why is it that AMD has projected roadmaps into 2Q 2008, and not one lick of news on a 3.0 GHz Phenom?

Where the hell are the dual cores?
Where does Intel's product line suddenly regress in performance, or is it now utterly exhausted for optimization?
Is there some code that only can run for AMD?

Just how massive of an improvement has any commodity processor gotten in its brief life cycle that somehow keeps it superior to the next generation of the competitor's product.

News flash: it wasn't true except for one fraction of the battle between K7 derivatives versus Netburst.
Athlon beat Williamette.
It was beaten by Northwood.
K8 beat Northwood, which also ironically beat Prescott.

I think AMD's months of delays have done that pretty well.
Intel's ramps these days have been aggressive.
Intel's latest shipment history indicates it will be available in the same timeframe AMD's ramp actually takes hold.
AMD itself stated not to expect a significant revenue impact from the 10h family in 2007.
It has pushed its product ramp to coincide with Intel's next product ramp.

AMD's currently released products barely hit the low water mark of the current Intel lineup.

I know why K7 had those problems. It doesn't negate the fact that those problems hurt AMD's product uptake.

Let's follow my theory: that platform problems hurt product adoption--regardless of the their cause.

You're kidding, right?
Phenom is a clean-sheet design unrelated to K7 and K8?
Did the new logo on the heatspreader throw you off?

K10's integer pipeline is only slightly updated from K8.
Its SIMD resources are doubled and slightly elaborated from K8.
Its cache structure from the L2 to L1 is only altered in that the datapath is wider and there is a bit more prefetch logic.
The bigger change is in that dog-slow L3 and frequency-capped memory controller.
Guess what, until they fix the frequency scaling for those components, any Phenom we buy will be hobbled.
If you want, you can say Phenom might be more competitive a few months from now.
Any chip bought right now will not meet your criteria.

One can get a very good idea of clock speed scaling when the critical execution paths for K8 and 10h are so closely related.
One can get an idea of AMD's problems when the TDP skyrockets in a matter of a few speed grades.

And CPU-Z has had problems with ID strings for new steppings a bunch of times.
Did you go out screaming about new architectures every 2 months?

You seem to be under the impression that there is some kind of mystical power to be unlocked in CPU silicon.
The science of CPU design is more mundane, and thus far its track record and predictive power exceeds yours.

People were saying about 8 months ago that Phenom would not beat Core2 at single-threaded integer IPC, that it would be closer with FP, and likely win in some cases with memory-bound FP. They said it would not be performance competitive until it got more clock speed.

They surmised that some of Barcelona's attempt at increasing MP scalability would hurt single-threaded performance. The smaller L2 and shared L3 would increase latency.

That's how it turned out.
Do you think they did that by reading tea leaves?
I'm arguing you can tell a lot by evaluating the components of a system, if you really want to look.

How about the fact that the areas Barcelona does best in are the same areas that even K8 does very well in comparison to Core2?
New design that acts like the old one?

What they didn't predict and nobody expected was how late and slow Phenom would be, and how unprepared its board partners are.
They did not predict that AMD's native quad-core had latencies for data sharing on par with Core2's MCM.
They didn't think AMD's memory latency would have gotten so much worse.
Every prediction that they got wrong has gone wrong in the wrong direction for AMD.

The real irony was that P4 forced certain coding practices that in the end benefited AMD as well.
There were areas where optimizations favored one over the other, though there was far more overlap than you seem to think.

AMD does not have its own optimized compiler.
It foists the work on a collection of 3rd parties.
It shows when the Spec scores for Barcelona have a different compiler for every other subtest.

This is true, but those cases were so far inbetween near the end that they were eclipsed by general performance gains.
Tell me, what corners to the Core2 architecture are there that would not be present for Phenom?
Core2 is of the same design philosophy as K7. It is a wider OoO core with a more standard OoO engine. It even packages a lot of its micro-ops in the same way as K7.
What exactly does it do that is so completely out of the realm of what Phenom must do?

Too bad it rates K8 so highly in some of its subtests.
Damn them and their K8 favortism.

I've just invented a bow and arrow that can defeat the heavy plate armor worn by the Teutonic Knights. Do you think I can set up my shop near the apothecary and fortune teller in the village market?

Unless you consider that fact that Intel managed to saturate a huge amount of the market segment Phenom now targets.
Or that Intel charged high prices at the time, and has now cut prices to make it near commodity status.
Let's not forget an AMD exec said something to that effect.

There are so many other factors involved, that I'd argue you are positing a false choice.

What merits would those be?
Its being fashionably late when the architecture it would have mostly had a chance against is being replaced?

You keep saying 1.9 GHz.
I recall launch speeds over 2.6 GHz.

And you are missing the point.
AMD has disclosed a TLB protocol erratum in the L3 cache that basically causes instability in parts clocked at or above 2.4 GHz at load.
It was so bad that they postponed the launch of an entire speed grade.

In the grand scheme of overclocking problems, a chip that by the manufacturer's admission screws up 100 MHz over its already low launch speed is not an interesting overclocking target, especially when the TDPs a few bins up are already so high compared to the competition.

I was being facetious.

I'd be interested in which numbers you are looking at.

That's where you are trending towards wrong.
Phenom isn't nearly as new as you think.

Considering the lag time in software development, 65nm Phenom will be running code that is poorly optimized for all of its short life.

By definition, a trend with only sparse contradictions is consistent.
I'd also argue that sparse examples are not all that dramatic.

In conclusion, I argue my representation has not yet been contradicted.

I don't really need those chips to beat Phenom, do I?

If Intel can just ship 45nm in similar volume to 65nm Phenom, it's all that really matters.
Right now, it's not much of a stretch.

You're the one who says to count on incredible gains months down the road in the absence of any such claims by the company itself.

I'm looking at an extrapolation of past history and current trends.

Sure, something unexpected might come up, like Intel's Hafnium gates kill puppies, but I'd rather bet on the puppy killing transistor than the mystical K7 derivate.

I'm saying Phenom is late. (Hector Ruiz said this).
I'm saying its launch is weak. (The smattering of reviews, limited board selection, and indeterminate shipping quantities and dates, the expectation of another stepping to fix today's bugs)
I'm saying its platform is not ready.
(New BIOS is now needed for all Phenom boards for chips over 2.4 GHz, new stepping required on top of that)
I'm saying a competing design clocks better and does on average better at the same clock. (Numerous examples that aren't benchmarks)
I'm saying that the competing design is in a few months going to be replaced by a better design. (A design that is shipping in limited quantities right now and has been seen running applications and sampling longer AT SPEED than Phenom has had working samples on display)
I'm saying that the manufacturing behind this better design has all the indications of being as solid as the aggressive ramp of the current design.
(One or two fabs are in production, more are planned to be ready for the first half of 08)

I'm saying AMD is saying little because it has nothing good to say. (Marketing 101)
I'm saying AMD is severely limiting samples of a chip that should be shipping in the millions because it either can't ship it in the millions or has nothing good to say.
I'm saying AMD's design does not favor single-threaded performance compared to how Intel's does (microarchitecture 101).
I'm saying AMD's TDP skyrockets at oddly low speed grades. (AMD)
AMD has a clock speed gap of almost 1 GHz (1st grade math).

My believing this does not require that I suck Intel's corporate cock.

 

Dude, I loved the WoT overall. Do not shame its' name with such associations.

Getting back to Phenom:is anyone clear on what's causing the mobos' alleged instabilities?It's not like the bioses are fresh out of the oven, I think the bios Hexus' MSI board had was released somewhere in September/October at the latest.

 

I've seen Core 2 Quad benches with vastly varying FSB clocks and about the only time it made a really significant difference was archiving with WinRAR.
http://www.nordichardware.com/Guides/?page=10&skrivelse=517

So I don't think it's anything near the limitation that he made it out to be. When you go multi-socket, maybe that changes. I really don't see multi-socket performance as very important at all for the majority of users though, considering we'll have 8 core CPUs soon enough.

 

I'm pretty sure the Anandtech review said they had just received a new bios from MSI for testing and Asus was going to send them an updated one relatively soon for their yet to be released board.

Fromt he sounds of the Anandtech review, it also sounded like quite a bit of instability revolving around the SB600 + 790 combo.

At this point though it's hard to say whether all the problems can be fixed with a new BIOS or if it'll require another revision of the chipset. Kinda reminds me of the old VIA days. Where you always waited for the "a" revision of a chipset for performance and stability. Hopefully that's not the case with 790.

Regards,
SB

 

In consumer desktop use it really doesn't matter all that much. It's only when you get to 4-way and greater multi-processor loads that the Xeon was brought to it's knees compared to competing Opterons. And this doesn't look to change until Intel goes to an on die memory controller and/or NUMA architecture.

And when I say 4-way I mean 4 physical processors not 4 cores. IE - with quad cores that would equate to 16 cores.

Having all processors going through the NB was bad enough but then it's futher hampered by the use of FB-DIMMs.

Regards,
SB

 

I think I'm acquainted with the SB600 issue somewhat, as it's plagued me with the RD600 DFI board I've been using. The fix won't come from AIBs, but from MS...there is a hotfix that adresses the Vista and SB600 in AHCI combination. If any reviewer is reading this, the hotfix is:http://support.microsoft.com/kb/931369. This should allow for AHCI and Vista with SB600(it did for me, fixed a couple of other thingies as well). What worries me a tad is that everyone is pinning the blame on SB600, which I'm not certain is entirely accurate.

 

Let me join the fun.

Can I have some?

The scary part is the IPC(instead of +40% it's -5% C2D).

Am enjoying the show.

 

That -5% is best case too, lol.