PCI Express 3.0 will arrive in November

[Unknown Soldier]

SAN FRANCISCO, Calif. – The base specification for PCI Express 3.0 should be complete by November, opening the door to a flow of products for the fast interconnect in 2011.

The PCI Special Interest Group released in mid-August a version 0.9 of the spec for the link that has a maximum data rate of 8 GigaTransfers/second. After a 60 day review it expects to release a final version of the base spec.

Typically, products are generally available for a new version of PCI Express about a year after the spec becomes final, said Al Yanes, chairman of the PCI SIG. However, some companies hungry for more bandwidth will roll products early next year.

Mellanox Technologies expects to release before June a version of its 40 Gbit Infiniband adapters using PCIe 3.0. The adapters now ride the PCI Express Gen 2 bus, but the 5 GTransfers/s link is a bottleneck that throttles throughput of the Mellanox cards down to 26 Gbits/s.

One source said Intel will support PCIe 3.0 natively on future versions of its Sandy Bridge processors geared for servers. Those chips could ship before the end of 2011. Initial Sandy Bridge CPUs shipping before April build in PCIe Gen 2.

The new interconnect is expected to be used for four-port 10 Gbit/'s Ethernet chips and next-generation 40 Gbit Ethernet chips now coming to market. It also will be used for high-end graphics cards and solid-state drives.

The PCI SIG does not expect to complete a specification for testing PCIe Gen 3 products until late next year. The group will issue tools to validate designs and start interoperability workshops in the middle of 2011.

The fast interconnect faced delays, in part due to the complexity of delivering an 8 GTransfer technology that could be broadly deployed by cost-constrained PCs. The spec uses dynamic feedback equalization which requires relatively sophisticated design techniques to maintain signal integrity.

News Source: http://www.eetimes.com/electronics-news/4207706/PCI-Express-30-will-arrive-in-November
PCI-E 3.0 Source: http://www.pcisig.com/news_room/faqs/pcie3.0_faq/

 

[CRoland]

PCI-E 3.0 Source: http://www.pcisig.com/news_room/faqs/pcie3.0_faq/

That is to say PCIe 1.x and 2.x cards will seamlessly plug into PCIe 3.0-capable slots and operate at their highest performance levels. Similarly, all PCIe 3.0 cards will plug into PCIe 1.x- and PCIe 2.x-capable slots and operate at the highest performance levels supported by those configurations.

Should mean there won't be too much delay in getting products.

I wonder if it also follows that power specs will stay the same.
Edit: Nevermind, says that they will.

 

[psolord]

Since English is not my native language, I would appreciate some help understanding the following, regarding power delivery.

Q15: Will PCIe 3.0 enable greater power delivery to cards?
A15: The PCIe Card Electromechanical (CEM) 3.0 specification will consolidate all previous form factor power delivery specifications, including the 150W and the 300W specifications.

That "consolidate" confuses me.

Couldn't it mean, that PCI-e 3.0 will also feature the 150W and 300W specifications, but there's room for more?

 

[rpg.314]

AFAICT, it means the two specs will be combined into one.

 

[psolord]

Thanks.

So that could mean that either the 6pin goes away, or the 8pin goes and the 6pin gets thicker cables. I think the first is more probable.

So if the 6pin goes away and 8pin stays, it's certainly not enough for 300W. That could mean that there will be a valid option of 8pin+8pin for future cards, with PCI-SIG's blessings?

I've heard that PCI 2.0 specifies that the PCI-e slot should provide 150W. Is that true?

 

[Grall]

They can't obsolete the 8-pin connector now or lots of old hardware wouldn't work anymore due to requiring a full 8 pins of power...

It's interesting btw that it's taken Intel this long to bring up PCIe to 8GT speeds, when Rambus Redwood was announced way way back in 2003 with 6.4GT... Even now, PCIe 16x at 32GB/s (yes?) aggregate B/W will lag quite a ways behind the ~62GB/s FlexIO interconnect featured in the now fairly aged Playstation3. I can't say I'm very impressed...

 

[aaronspink]

They can't obsolete the 8-pin connector now or lots of old hardware wouldn't work anymore due to requiring a full 8 pins of power...

It's interesting btw that it's taken Intel this long to bring up PCIe to 8GT speeds, when Rambus Redwood was announced way way back in 2003 with 6.4GT... Even now, PCIe 16x at 32GB/s (yes?) aggregate B/W will lag quite a ways behind the ~62GB/s FlexIO interconnect featured in the now fairly aged Playstation3. I can't say I'm very impressed...

Um, custom designed interconnect relying on no connectors and single party silicon on single party board vs

100's of different PCB makers
100's of different silicon makers
100's of different trace lengths
1e33 installed base for compatibility
multiple different connectors and cables

 

[MfA]

when Rambus Redwood was announced way way back in 2003 with 6.4GT

After industry crippling lawsuits and rent taking, announcing is what Rambus does best.

 

[MfA]

What does it matter what PCI-SIG says any way? As long as you don't use the logo or claim compliance with the retarded electromechanical standard which refuses to provide support for high power solution they can't touch you.

 

[Alexko]

It probably matters to OEMs. I guess to "enthusiasts" who get their cards separately, it doesn't.

 

[swaaye]

I want to see some tests of PCIe 1.0 vs. PCIe 3.0. Why did we bother with 2.0? Did it ever make a difference?

 

[psolord]

I want to see some tests of PCIe 1.0 vs. PCIe 3.0. Why did we bother with 2.0? Did it ever make a difference?

According to Anand's 5870 Crossfire testing a while back, two 5870s can see a performance drop of 2-7% when going from 2 X16 PCIe 2.0 to 2 X 8 PCIe 2.0. Now X8 PCIe 2.0 is equal in terms of bandwidth as a X16 PCIe 1.0 setup.

So if we didn't have PCIe 2.0 already, two 5870s could not perform at their max. That situation could be even worse if you did the same test on two 5970s. Same goes for two 6870s and so on and so forth.

PCIe 2.0 could be more than enough for now. I guess that the standards makers, are always looking into the future though. Better be ready than trying at the last moment.

 

[fehu]

The next highend chipset from amd will be out in Q2 2011 and will be PCIe 2.0
so, if even amd isn't pushing the commercial combo uber processor + uber gpu glued with PCIeNext, when will we see it in a real product? :S

 

[aaronspink]

The next highend chipset from amd will be out in Q2 2011 and will be PCIe 2.0
so, if even amd isn't pushing the commercial combo uber processor + uber gpu glued with PCIeNext, when will we see it in a real product? :S

The reality is that GPUs weren't really pushing PCIe 2.0 nor 3.0, its the server side that's pushing it. Right now both storage and network controllers can saturate PCIe 2.0 and specifically x8. 4x10 / 40 Gbe and infiniband already are bottle-necked by 2.0. And IB wants to hit 4x20gb and 4x40gb soon. A simple 8 port SAS2 controller also is at saturation on 2.0 x8 and they want to both up the port count and up the speed by 2x as well.

 

[Davros]

Lets hope they backwards compatibility works, as its not their strong suit