NVIDIA patent: Programmable geometry engine, maybe for RSX?

Discussion in 'Console Technology' started by j^aws, Jun 1, 2005.

  1. j^aws

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    User programmable geometry engine

    WGF 2.0? PS3's RSX? Or would CELL's SPU's be capable?
     
  2. nAo

    nAo Nutella Nutellae
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    Henry Moreton has filed with NVidia a lot of patents regarding various hw tesselators architectures, I believe there are even more recent patents from him on UPSTO database.
     
  3. cho

    cho
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    geometry shader ?
     
  4. version

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  5. nAo

    nAo Nutella Nutellae
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  6. j^aws

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    Yep, he sure has plenty of tesselation type patents...

    HENRY MORETON

    Interestingly, this particular patent has Mori et al from a Toshiba GPU patent cited as a reference. Remember this patent?

    http://www.beyond3d.com/forum/viewtopic.php?t=15986

    Shhhh....it mentions the *R* word! :p
     
  7. Farid

    Farid Artist formely known as Vysez
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    SPEs? High Order Surface engines?

    Keep off crack, dude. :lol:
     
  8. Mythos

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    Jaws,
    I was thinking about this whole GPU issue with Sony, Toshiba, and Nvidia. About whether someone got shafted out of the GPU deal or if the GPU was a last minute add in. However, I think it is probable that instead of wasted time spent that whatever work was done initially could be transfered over to the RSX (specially the good parts of the Toshiba GPU/Compatible with RSX). I can see that Sony had a goal it wanted to meet with the GPU and the Nvidia deal satisified those goals. (Add to it the patents each company advanced without any useage would be a waste.)
     
  9. The GameMaster

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    WGF 2.0 compliance patents it seems for future technologies that they will need to incorporate for their future products (NV6x+ GPU series) so they will be WGF 2.0 compliant for the upcoming Windows platform. Basically part of WGF 2.0 compliance is the GPU needs to be able to CREATE geometry. Certain technologies was built into the CPUs in the XBox360 to make the machine WGF 2.0 compliant even though the GPU is not. The Cell CPU, while it is able to create geometry... it is not able to do it in the method as described in WGF 2.0 compliance or the method's required for the extensive use as employed with the procedural synthesis. The ability to create geometry must be implemented in HARDWARE... not software for WGF 2.0 compliance.

    Long story short this is for future nVidia products (NV6x+) not the NV50 series or the RSX which is suppost to be based on that technology. Can't say the R520 from ATI will be WGF 2.0 compliant either... same boat as nVidia, though with the inside track as they are cooperating with Microsoft may give them an inside line on WGF 2.0... regardless I don't expect that until the R6xx series GPUs from ATI.

    The GameMaster...
     
  10. Carl B

    Carl B Friends call me xbd
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    There's absolutely no way the R520 will be compliant - the WGF2.0 standard hasn't even been finalized yet. Add to that that it's already been claimed to be a DX9.0c/1.0++ part and well there ya go. It would be stupid for the graphics makers to release a WGF2.0 compliant part this year, even if they were ready to do so, as it would deprive them of a possible forced upgrade cycle next year or in 2007 when Longhorn will bring the standard into being.
     
  11. one

    one Unruly Member
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    Wow, so this was really an RS patent? :shock: Now, in what way does the new nVIDIA patent develop on the Toshiba RS?
     
  12. London-boy

    London-boy Shifty's daddy
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    So... errm... in layman's terms, what exactly will this allow?
     
  13. nAo

    nAo Nutella Nutellae
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    They are just citing some patents that share something in commong with their application. Toshiba patent was about a hw REYES implementation, but it was also about a programmable tessellator. I wouldn't look for connections that are not really there.
    Moreton work it's not about REYES at all, it's about a number of fixed function processors designed around a number of basic processing steps involved in surfaces tesselation.
    It might be someway similar to r500 hw tesselator, which is a fixed function hw block AFAIK, but it takes as input a number of parameters that can be generated by a special geometry shader.
     
  14. j^aws

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    I don't look at this as someone who got shafted. But like you say, they had a goal. It's simple really, as any project would have three key elements, cost, delivery date and specification. As long as these criteria are met, it doesn't really matter on the actual means. In fact, it takes more courage to *switch* the status quo than mindlessly follow a particular path because of past precedents and inertia! :)

    Sony, nVidia and RSX don't need any WGF 2.0 spec to be agreed. They can *add* what they like to the PS3...
     
  15. psurge

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    nAo - do you understand exactly what the fixed function blocks in the patent are? It's kind of confusing to me, because AFAICT, they issue instructions to the vector engine to do actual work (and by throttling their instruction or I guess thread issue rate, load balancing is achieved). So... are they in charge of actually creating/destroying vertices, or...?
     
  16. nAo

    nAo Nutella Nutellae
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    This patent describes a couple of configurations: the first one is pretty generic, the second one goes in deeper details and tell us fixed function engines perform a lot of different tasks, each task is a 'micro' step needed to tesselate or assemble primitives.
    Each FFE is associated to at least one user-programmable step, it runs shaders (sending commands to the vertex processor), and it assembles/creates primitives generating new vertex indices (new vertices coordinates are store in vertex ram).
    All the math work is accomplished by the vertex processor and the scheduler decides wich FFE has to serve.
    In the last embodiment there are 4 FFEs, each FFE is associated with a specific task/program: a single-vertex program, a subdivision program, a mesh program and a general program.
    For example the subdivision program is splitted in several task, each task runs a subprogram, the associated FFE performs fixed function tasks between each subprogram:
     
  17. j^aws

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    Maybe a vec4 + SFU cluster could act as a geometry/ vertex shader? 8)
     
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