NVIDIA Fermi GPU and Architecture Analysis

Discussion in 'Beyond3D Articles' started by AlexV, Oct 23, 2010.

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  1. AlexV

    AlexV Heteroscedasticitate
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    #1 AlexV, Oct 23, 2010
  2. Florin

    Florin Merrily dodgy
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    I was wondering what the slimer thing was about and figured it'd be revealed soon(tm) enough. This is a sweet surprise *runs off to read*
     
    #2 Florin, Oct 23, 2010
  3. Sxotty

    Sxotty
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    Congrats! It's ALIVE!!!
     
    #3 Sxotty, Oct 24, 2010
  4. trinibwoy

    trinibwoy Meh
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    Wow those are some damning results if they're accurate. Even though synthetic tests don't tell the whole story there's no doubt nVidia's heavily relies on software.

    The round trip to L2 for shared-memory atomics seems a bit ummm, retarded....

    Oh and good job guys.
     
    #4 trinibwoy, Oct 24, 2010
  5. wishiknew

    wishiknew
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    Sontin got a mention.

    And my god, someone checked the home page.
     
    #5 wishiknew, Oct 24, 2010
  6. Florin

    Florin Merrily dodgy
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    Heh yeah quite cheeky that.

    It'd be interesting to find out if the untessellated triangle setup limitation is indeed implemented in software only - circumventing that'd appeal to the hardware ricer in me.
     
    #6 Florin, Oct 24, 2010
  7. wishiknew

    wishiknew
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    Is Beyond3d going to do a quickie on the Barts?
     
    #7 wishiknew, Oct 24, 2010
  8. digitalwanderer

    digitalwanderer Dangerously Mirthful
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    Fermi finally came out? Really? :|
     
    #8 digitalwanderer, Oct 24, 2010
  9. 3dcgi

    3dcgi
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    How does the system value mechanism (SV_position) differ from the 1-4 attributes cases?

    When shader instruction throughput is tested are all stages active at once or is VS measured with only a VS enabled and GS with no HS and DS?
     
    #9 3dcgi, Oct 24, 2010
  10. fellix

    fellix
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    That's "Slimer" for you, soldier!

    :razz:
     
    #10 fellix, Oct 24, 2010
  11. rpg.314

    rpg.314
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    It wouldn't be B3D if it was a quickie. :lol:
     
    #11 rpg.314, Oct 24, 2010
  12. Squilliam

    Squilliam Beyond3d isn't defined yet
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    Hey if Fermi = Slimer, what is Cypress? Would it be something like Chicken Korma? :p
     
    #12 Squilliam, Oct 24, 2010
  13. AlexV

    AlexV Heteroscedasticitate
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    Using SV_Position is equivalent-ish with the 4 Attribute case applying the noperspective modifier to the latter, hence the comments in the article about the performance delta between the two cases being interesting.

    I use the fewest possible stages - so for VS only that is active, for GS you get VS+GS and so on and so forth. There's obviously more to see in that area than what was shown in the article, so that, like other aspects, is still under active development, but we've discovered that eventually some things have to come out so that people still remember that there's a frontpage/another facet of B3D.

    Squilliam: you're better of not knowing the answer to that one:)
     
    #13 AlexV, Oct 24, 2010
  14. foo

    foo
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    I am stunned if your programs are correct how the 480 can beat the 5780?

    Remarkable!!
     
    #14 foo, Oct 25, 2010
  15. Squilliam

    Squilliam Beyond3d isn't defined yet
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    If not knowing is safer then yes I will choose not to know. :razz:
     
    #15 Squilliam, Oct 25, 2010
  16. CarstenS

    CarstenS
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    Thanks for the article guys, I really enjoyed reading it yesterday evening! Now, in the coming weeks i might be busy trying to understand it as well. ;)
     
    #16 CarstenS, Oct 25, 2010
  17. mczak

    mczak
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    Very nice article!
    I think the Vec4 MAD Int rate quoted in the table for HD5870 is wrong. Should be only half (same as Vec4 MUL Int).
    Any idea what's going on with DOT2 on HD5870? The table correctly states the max issue rate (as the chip should indeed be able to execute 2 of them per clock) but why is it often only half that of DOT4? Makes no sense. Are there bank conflicts or something?
     
    #17 mczak, Oct 25, 2010
  18. AlexV

    AlexV Heteroscedasticitate
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    Thanks for taking the time to read it!

    32-Bit Int MUL is done by the fat ALU. All ALUs are capable of ADDs though, which translates into a Vec4 ADD per block, times 16 blocks per SIMD, times 20 SIMDs, times 850MHz, which equals 272 GInstr/s. What was wrong in the table was the Vec4 MAD rate, which I corrected now.

    The problem with DOT2 is a combination of how I setup the test, which is a string of dependent ops, to break some compiler optimizations, and a bit of driver wonkiness. Practically I've verified it can do 2 DOT2s per block per clock, and should probably re-work that particular test a bit to show it(and this should've been mentioned in the text as well, whoops!).
     
    #18 AlexV, Oct 25, 2010
  19. Squilliam

    Squilliam Beyond3d isn't defined yet
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    How long does it take to make an article like this?

    Anyway, I take it Dave would be kind enough to provide a Cayman when applicable? :)
     
    #19 Squilliam, Oct 25, 2010
  20. Tahir2

    Tahir2
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    That is a very nice article and surprisingly easy to read, the level of prodding was outstanding.

    I would imagine an article comparing Cypress to Barts to Cayman, see what kind of sacrifices and improvements AMD has made to its architecture to increase efficiency would also be a surprising read.
     
    #20 Tahir2, Oct 25, 2010
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