Nvidia 55nm Q2 2008

The first link has been removed at Fudzilla?

As for the second link I'm confused now; the slides for the 9600GT show clearly only D3D10/SM4.0 support. Are some parts of the ninth generation 10 and some 10.1 compliant?
 
The first link has been removed at Fudzilla?
Just a broken link, here's the working one: http://www.fudzilla.com/index.php?option=com_content&task=view&id=5054&Itemid=1
(notice how the bborad cuts the url displayed putting in ...'s, but the linked url is the full thing. people often copy the displayed url with ...'s instead of the original full one)

As for the article, it's typical fuad having no clue about the industry. Tape-out means a completely finished design sent off to a fab for production. "Talking" about a process is no where close to a tape-out, and of course they're talking about the process. I'm sure they've talking to every fab about every process that's come out in the last few years.
 
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Does anyone care? (just asking)

From reading around in forums developers obviously seem to care. But my question was rather in the direction why an IHV would have two sorts of compliance within the same "generation". If there would be such a case I'd rather expect something like 8xxx for D3D10 and 9xxx for 10.1.
 
Just a broken link, here's the working one: http://www.fudzilla.com/index.php?option=com_content&task=view&id=5054&Itemid=1
(notice how the bborad cuts the url displayed putting in ...'s, but the linked url is the full thing. people often copy the displayed url with ...'s instead of the original full one)

Ahhh thanks.

As for the article, it's typical fuad having no clue about the industry. Tape-out means a completely finished design sent off to a fab for production. "Talking" about a process is no where close to a tape-out, and of course they're talking about the process. I'm sure they've talking to every fab about every process that's come out in the last few years.

In Fudo's defense (or not :D ) he said "tapped out". Jokes aside if NV should plan to release anything based on 55nm in 2008, they're obviously way past the stage of any sort of investigations/negotiations across foundries.
 
Tape-out means a completely finished design sent off to a fab for production.
Not quite, unless by "production" you don't mean mass production. Its a lucky day indeed when the first mask set can go to mass production, but even then, "production" can't begin until first silicon comes back, gets validated, then more wafers are sent through to get matrix lots (getting all process corners for characterization), burn in (90 days or more isn't uncommon) before (mass) production wafers are started.

What usually happens is the first set comes back and validated; there's a few minor bugs; some mask set revisions are made (hopefully not all layer revisions); rinse, repeat, then around minor revision 3 or so, you go to production.

Tape-out to production is somewhere in the 6 months to a year range, depending on how good your pre-silicon testing is. (90nm is almost 1.5 months to get first silicon, and it only gets longer as you go down in geometry)
 
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