More algorithms with irregular memory access on Cell (paper + code)

Discussion in 'CellPerformance@B3D' started by Titanio, Sep 14, 2007.

  1. Titanio

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    Apologies if old. This paper is from March, but I can't remember it being discussed before, and a quick search suggests it wasn't. I don't think it's in the CellPerformance forum at least, so it's as well that it's posted here for reference if nothing else..I think it could be a particularly good reference for people facing similar problems, since the techniques presented may be more generally applicable than is often the case in these papers.

    Anyway, after the DDJ article on Breadth First Search on Cell, there's another interesting study here, this time on ListRank on Cell. This one also comes with code :) The paper shows a strategy for analysing algorithms on Cell, and proposes methods for efficiently implementing algorithms with fine-grained irregular global memory access, using ListRank as an example. One key part of the approach is software multi-threading on the SPEs to overcome DMA latency and low computational intensity - an approach that may be generally useful with any algorithm characterised by random global memory access.

    On the Design and Analysis of Irregular Algorithms on the Cell Processor: A case study on list ranking

    In comparison with other architectures, they achieve over 4x speedup over a 3.2Ghz intel xeon with a list size of 8 million nodes (various others are listed in the paper).

    So again, sorry if old, but it was the first time it caught my eye, and I think it could be quite useful!
     
  2. patsu

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    I think it was presented in the Cell Symposium but the paper was not available for download. Thanks for the link !
     
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