Memory technology article at Ace's Hardware...

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bdmosky

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Although not directly related to graphics cards, I thought it might be good to link to it here as it discusses DDR II a little bit (and I mean a little bit)and with all the confusion over it, maybe this'll help clear things up...

http://www.aceshardware.com/read.jsp?id=50000275

Also I find the little tidbit about Yellowstone highly interesting too... I'd always imagined Rambus memories finally fading into the background, but if they can offer the 100gb/s bandwidth they are promising on a 128bit bus, I'm sure many chip makers will be jumping for it... but then again... that's a BIG if...
 
Me too, but I don't think that was the full purpose of the article... Maybe that'll be covered in the next installment?
 
anyone news to yellowstone apart from that?
Click to expand...

Hehehehe . . . Yellowstone has a very interesting technology that I'm very surprised that the media hasn't picked up on yet. I found it deep in a presentation. I'll explain more when I have some time . . .
 
I finally get around to posting this on the front page and then come here and find that it's been in the forum for a while already :D
 
Oh, hey, thanks Basic. I didn't realize they had put it up.

http://www.rambus.com/about/pressreleases_2002/020708.shtml

This Flexphase technology that is used in Yellowstone basically eliminates impedance matching. This will be incredibly important for future high speed devices.

A few comments:
-JEDEC will have to license this tech from Rambus to get anywhere near as fast as Yellowstone will be
-Motherboard makers will have much more space to work with
-Uses a PBGA package
-A 128-bit mem controller could take us over 100GBs!
-Fully bidirectional to decrease interference problems
-The reduction of impedance matching will decrease cost by a large amount

  • -much cheaper materials can be used
    -verification cost drops dramatically
    -yield increases by a good margin
    -design of RAM is much simpler and easy to implement into products
-IMO, this will be the last device before we move to optical

One thing that I'm not so sure about is the die space that Flexphase takes up. This could raise costs and possibly add latency. We'll have to wait for more details from Rambus.

Here's some info on it:

http://www.rambus.co.jp/forum/downloads/TE/1rambus_ rwarmke.pdf

(check out page 13)
 
They can avoid tracelength matching, but that is more about timing than it is about impedance. Its nothing fundamentally new though, Ive seen papers describing tapped delay lines for this before (Ive been saying for years parallel busses with differential signalling and timing equalization through tapped delay lines were the future in fact :). Although if my guess is correct and Rambus's technology came from the work done for <A HREF=http://velox.stanford.edu/papers/ey_thesis.pdf>this Ph.D thesis</A> its slightly more advanced :)

Given the prior art I think alternative methods as effective could be devised though ... for the rest it just gets its speed from differential signalling, which is old hat too. Rambus's patent on synchronous clocking will remain their only trump card. Thats more than enough though, it could force the rest of the industry to have to settle for serial connections with embedded clocks if they want to avoid it ... which is more complex and has some overhead, but could still get almost the same bandwith per pin.
 
Ouch.
That thesis was surprisingly easy reading to start with, but a ways into chapter two the hurting started, and it never let up from there. ;)
It is sad in a way that RAMBUS having the IP rights of good tech may now effectively ensure that it never comes to market.

Entropy
 
Differential technology was used to design very high-frequency full adders cells in 1987 by some Canadians researchers.
 
Fully differential signaling is nothing new, yes. In fact, there are a number of different busses that use this tech (AFAIK-Infiniband and some others use this). It is just another advantage over RDRAM, which uses pseudo-differential signaling.

They can avoid tracelength matching, but that is more about timing than it is about impedance.
Click to expand...

I'm not quite sure how this does not negate impedance matching. The wave phases are all properly aligned, right? Could you explain please?

I don't think JEDEC needs to license this technology because by that time they'll have QDR memory
Click to expand...

That would make it even more necessary to license Flexphase.
 
Timing can be spot on, but the impedance of the termination can still be a poor match for the impedance of the traces on the PCB ... you are thinking a little too analog, impedance is not so much important because it affects the phase of the signal but because of reflections. They have dynamic termination to deal with impedance matching on chip too, but its seperate from FlexPhase.

There's a far better example of a previous use of differential signalling, SLDRAM :/
 
elimc said:
I don't think JEDEC needs to license this technology because by that time they'll have QDR memory
Click to expand...

That would make it even more necessary to license Flexphase.
Click to expand...

You don't think JEDEC will be able to come up with a viable solution without licensing this technology from Rambus? There are many ways to skin a cat no?
 
You don't think JEDEC will be able to come up with a viable solution without licensing this technology from Rambus? There are many ways to skin a cat no?
Click to expand...

They might, but look what happened to Rambus. I'd be a little wary of investing money into RAM research if I were in JEDEC. I don't see too many companies that want to voluntarily do research that might just become an open standard or stolen. I don't think that the companies in JEDEC trust each other all that much. Just IMO.

By the year 2005, Rambus will have a solution that is almost twice as fast as anything JEDEC to offer, and IMO, this gap will grow.
 
Timing can be spot on, but the impedance of the termination can still be a poor match for the impedance of the traces on the PCB
Click to expand...

Is this why DDR SDRAM still has to have all the traces the same length?

you are thinking a little too analog, impedance is not so much important because it affects the phase of the signal but because of reflections.
Click to expand...

Yellowstone will be operating at effectively 3.2-6.4GHz. I'm not sure how square the digital waves are at this speed. Could you shed some light on this? I'm still learning my stuff, MfA. :)
 
elimc said:
Timing can be spot on, but the impedance of the termination can still be a poor match for the impedance of the traces on the PCB
Click to expand...

Is this why DDR SDRAM still has to have all the traces the same length?
Click to expand...

DDR SDRAM has no FlexPhase so they have to be so for timing reasons anyway, although the tolerances are higher with the lower frequency of course. It can make the impedance of all the traces roughly equal too, so I assume it makes termination easier also ... but that's besides the point.

you are thinking a little too analog, impedance is not so much important because it affects the phase of the signal but because of reflections.
Click to expand...

Yellowstone will be operating at effectively 3.2-6.4GHz. I'm not sure how square the digital waves are at this speed. Could you shed some light on this? I'm still learning my stuff, MfA. :)
Click to expand...

Well its a transmission line, you seemed to be thinking more of it as an analog filter ... which it is also, but as far as this discussion was concerned it's not too helpfull to think of it in that manner.

Marco
 
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