Low-cost emerging market SoC/phone discussion

Discussion in 'Mobile Devices and SoCs' started by ToTTenTranz, May 12, 2011.

  1. Nebuchadnezzar

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  2. ToTTenTranz

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  3. mboeller

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  4. liolio

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    Wow! Dark silicon is turning into CPU cores, or the other way around CPU cores are the new dark silicon... lol
     
  5. Ailuros

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  6. ToTTenTranz

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    How are they going to do 10 cores? 4+4+2?
    4 Cortex A53 + 4 Cortex A53 (higher-clocked) + 2 Cortex A72?


    Do you know what would be funny? If Mediatek decided to copy AMD's "Compute Unit" naming scheme and we're actually talking about 4 Cortex A53 + 4 Cortex A72 + 2 CU (128 shader units) GCN GPU.
    Of course, a much better allocation would be 4 A53 + 2 A72 + 4 GCN CU, though Mediatek has been historically mediocre on their GPU choices.
     
  7. Ailuros

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    Unless my memory is failing me there's no up to 4 cores limit anymore for A7x ARM cores; another likely scenario would be 6*A72 + 4*A53 just don't dare to ask me what for as I'll be as clueless as anyone else apart from the "geniuses" in Mediatek's marketing department.

    As for the shader crap NVIDIA's marketing has influenced others long before; I don't recall if Mediatek took part of the ALU lane = core sillyness, but Allwinner marketed the G6230 in its A80 SoC as a "64 core" GPU.
     
  8. geeQ

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    From what I have read the 4 core limit per cluster still exists even for A72 and ARM's new interconnect IP. I have been thinking more along the lines that Helio x20 could be using a mips i6400 'Warrior' core. These new cpu's can do 6 cores per cluster, and we of course know that Mediatek has a good business relationship with Imagination. There has also been talk that Mediatek are working on a 12 core variant, which would also be technically viable with i6400.
     
  9. Laurent06

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    CCI-500 allows one to connect up to 4 clusters of 4 CPUs.
     
  10. Alexko

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    So 4 + 4 + 2 would be an option.

    Or generally speaking, n + m + k, where n, m, k ≤ 4 and n + m + k = 10.

    A solution with four clusters would also be possible, but probably stupid.
     
  11. Laurent06

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    There's only one other solution to your system of equations : 4+3+3 :)
     
  12. mboeller

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  13. Alexko

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    True! :D But there are different kinds of 4+4+2 and 4+3+3. Knowing Mediatek, I would have guessed 4×A53 + 4×A53 + 2×A72. If Gizmochina is correct, that wouldn't have been too far off.
     
  14. Ailuros

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  15. mboeller

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    #375 mboeller, Apr 21, 2015
    Last edited: Apr 21, 2015
  16. Ailuros

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    Makes sense; I just honestly hope they aren't intending to combine that with some sort of dual cluster Mali or Rogue pissat GPU again.
     
  17. ToTTenTranz

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    For the lack of information about the GPU, for me it means they're holding it back for a larger announcement.. Which points me back to the AMD GPU rumour.
    Imagine this chip with a 6-8CU GCN GPU at 500/600MHz and they're in for a best-in-class SoC.

    Besides, why else would they need a 128bit memory access? Dual 32bit or single 64bit with LPDDR4 would do ~25GB/s, which is spectacular for a smartphone.. but they're going all the way up to 50GB/s!
    Why do that to feed a mediocre GPU?
     
  18. Ailuros

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    It's typical for most of them to reveal the GPU among the last things; I don't see any indication for anything. And frankly while listening to what the folks in the background have to say, let me just only repeat that apart from Fudo (THE ultimate online journalist....) no one else seems to know anything about it and not a peep from Charlie dearest either, doesn't sound all that encouraging...

    What makes you think that a any sort of ULP mobile GPU with =/>4 clusters wouldn't benefit from that kind of bandwidth especially considering the shitload of CPU cores the SoC can enable in N non realistic scenario? :p For the record's sake you have a 128bit bus already on the A8X.
     
  19. ToTTenTranz

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    The A8X uses 128bit LPDDR3 (25GB/s) for an 8-cluster GPU capable of ~230GFLOPs at the estimated 450MHz.
    If you assume that apple/Intrinsity usually produce very balanced designs, you have 25GB/s for a 3-core CPU and a 230GFLOPs GPU.
    An 8CU (512sp) GPU at ~400MHz would do ~410GFLOPs.

    If the Helios X20 uses a 128bit bus with LPDDR4, we'd have twice the memory bandwidth for an iGPU with almost twice the FP32 throughput. It doesn't sound unreasonable.
     
  20. Alexko

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    Erinyes, iMacmatician and ToTTenTranz like this.
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