As if on cue, Anand revised the single-threaded bench result. Nehalem is only slightly better than Penryn per clock now.
I had a feeling something was up with those Cinebench numbers...
As if on cue, Anand revised the single-threaded bench result. Nehalem is only slightly better than Penryn per clock now.
Ok this changes everything. Looks like I'm sticking with Penryn for a while.As if on cue, Anand revised the single-threaded bench result. Nehalem is only slightly better than Penryn per clock now.
Ok this changes everything. Looks like I'm sticking with Penryn for a while.
Ok this changes everything. Looks like I'm sticking with Penryn for a while.
Are there any rumours of future AMD processors going SMT (same core)? I haven't seen anything to suggest they might, but maybe they'll wise up.
There was once a rumor of reverse SMT. IE, splitting a single thread into multiple. I think it was supposed to be that on branchy code, each core would calculate a separate outcome and use whichever result was correct.
BTW, anyone know when the 45nm phenoms are supposed to launch and what changes they have from 65nm?
The only problem there is do the benefits justify the setup costs? Since no one is doing it just yet I'd guess not?
The 45nm parts increase the L3 from 2MB to 6MB, but I don't know anything about core changes.
There was once a rumor of reverse SMT. IE, splitting a single thread into multiple. I think it was supposed to be that on branchy code, each core would calculate a separate outcome and use whichever result was correct.
BTW, anyone know when the 45nm phenoms are supposed to launch and what changes they have from 65nm?
The guys @ RWT seem to think Reverse Hyperthreading is a fanboy's pipedream, bordering on the impossible. It would take quite the feat of engineering just to pull it off, and a miracle to get it to improve performance over current designs.
The benefit would be minimal. Branch predictors are on the order of 90+% efficient, it's rare for a mispredict to happen. And to implement that "reverse SMT", you'd need double the execution resources, but for a very small gain.There was once a rumor of reverse SMT. IE, splitting a single thread into multiple. I think it was supposed to be that on branchy code, each core would calculate a separate outcome and use whichever result was correct.
BTW, anyone know when the 45nm phenoms are supposed to launch and what changes they have from 65nm?
Well, I would think you could make it trivial by just duplicating all code executed, but that wouldn't exactly make for the whole power efficiency thing the industry is going for.