first generation PS2 EE: 13.5 or 10.5 Mtr??

[Quaz51]

the officials papers on the web are contradictory
after a long research, my hypothesis is:

first proto EE presented at ISSCC february 1999:
250mhz
0.25um
240mm²
10.5Mtr

first generation EE in PS2 after optimization et redesign for higher frequency:
300Mhz
0.25um
225mm²
13.5Mtr


it's strange (especially reduction of area and increase transitors simultaneous with a same process) but it's my conclusion after some research, and you?

 

[a688]

the officials papers on the web are contradictory
after a long research, my hypothesis is:

first proto EE presented at ISSCC february 1999:
250mhz
0.25um
240mm²
10.5Mtr

first generation EE in PS2 after optimization et redesign for higher frequency:
300Mhz
0.25um
225mm²
13.5Mtr


it's strange (especially reduction of area and increase transitors simultaneous with a same process) but it's my conclusion after some research, and you?

Although that isn't a hypothesis at all. You can't really reach a conclusion from that information alone. Was cache increased or decreased, was extra (large) redundency removed, etc. You can't tell anything just looking at those numbers.

 

[Quaz51]

You can't tell anything just looking at those numbers.

i ask just if this numbers found in the Web are true or not because it's not clear

 

[j^aws]

EE debuted at 180nm on PS2...source=Archie4oz!

I believe extra trannies are added sometimes to workaround hardware design bugs?

 

[one]

According to this paper "VECTOR UNIT ARCHITECTURE FOR EMOTION SYNTHESIS" in 2000....
http://www.ece.umd.edu/courses/enee759m.S2002/papers/00848471.pdf

Implementation
We implemented the Emotion Engine in 0.25-micron CMOS process technology with a 0.18-micron gate length. Figure 7 shows a micrograph of this chip. The 15.02-mm ´15.04-mm die contains 13.5 million transistors;
it operates at 300 MHz and typically consumes 18 watts of power.

 

[Megadrive1988]

Emotion Engine has 13 (or 13.5) million transistors. up from the 10.5 million it first had. the ~2.5 million additional transistors came as a result of bug fixes and "specification enhancement"
(but not more features added)

quote Panajev:
http://64.233.161.104/search?q=cach...5+million"+transistors+"13+million"&hl=en

The EE has 13 Million Transistors (10.5 Million Transistors was the 1999 specification for the 250 MHz EE, most of the additional 2.5 Million Transistors were due to bug-fixes and also some other optimization [no new features were added]).

quote EEtimes:
http://www.eetimes.com/story/OEG19991006S0040

The Emotion Engine, developed jointly by SCE and Toshiba Corp., has 13 million transistors. The part's transistor count increased by 2.5 million since the the CPU was first announced at the ISSCC in February. "Not because some functions are added," Kutaragi said, "but it finally had that number of transistors after bug fixes, specification enhancement, etc."

 

[Quaz51]

i confirm after new search with this few official screen

EE#1: 240mm2 and 10.5Mtr in 0.25um is the ISSCC's EE (and Dev kit probably)
EE#2: 224mm2 and 13.5Mtr in 0.25um also is the first PS2's EE

 

[j^aws]

Panajev has posted the PPT below...it quite clearly shows the 250 nm process extending into Fiscal Year 2000 . IIRC, that's after end of March 2000. It extends approx. a quarter into the FY2000, ~ Jun/ Jul 2000. PS2 was launched March 2000 in Japan. Unless they were binning them for fun, the EE was 240 mm2 and the GS was 279 mm2 at launch there.

Pana is posting IR material... It's fluff, and not exactly precise... The SCPH-10000 launched with the CXD9542GB (EE w/die area of approx. 224mm2 (and should note that a later revised EE (CXD9615GB) replaced it) and the CXD2934GB (GS w/die area of approx. 188mm2). That's about as specific as I can get with you... The micrographs you see of the EE and GS on the far left are from the original models that didn't even run at the released clock speed...

ASC7PL (.18µm) became available Q4 FY99, and in Q1 FY2000 ASC7DL (DRAM) was available for full blown ASC7 GS parts (although IIRC volume didn't really pick up until 2H FY2000)...

http://www.beyond3d.com/forum/viewtopic.php?p=357391#357391

EE launched at 180nm on PS2 according to Archie4oz, and he seems very sure...

 

[Quaz51]

with the same process the EE have much progressed between ISSCC and first PS2 (+50Mhz, + 3Mtrs, - 16mm²)

what will be the evolution between ISSCC's Cell (90nm) and first PS3's Cell if the PS3's cell is in 65nm?

 

[Quaz51]

Panajev has posted the PPT below...it quite clearly shows the 250 nm process extending into Fiscal Year 2000 . IIRC, that's after end of March 2000. It extends approx. a quarter into the FY2000, ~ Jun/ Jul 2000. PS2 was launched March 2000 in Japan. Unless they were binning them for fun, the EE was 240 mm2 and the GS was 279 mm2 at launch there.

Pana is posting IR material... It's fluff, and not exactly precise... The SCPH-10000 launched with the CXD9542GB (EE w/die area of approx. 224mm2 (and should note that a later revised EE (CXD9615GB) replaced it) and the CXD2934GB (GS w/die area of approx. 188mm2). That's about as specific as I can get with you... The micrographs you see of the EE and GS on the far left are from the original models that didn't even run at the released clock speed...

ASC7PL (.18µm) became available Q4 FY99, and in Q1 FY2000 ASC7DL (DRAM) was available for full blown ASC7 GS parts (although IIRC volume didn't really pick up until 2H FY2000)...

http://www.beyond3d.com/forum/viewtopic.php?p=357391#357391

EE launched at 180nm on PS2 according to Archie4oz, and he seems very sure...

no, apparently the EE version 2 with 224mm² is a 250nm process in accordance with the officials papers, look the precedent image

 

[j^aws]

with the same process the EE have much progressed between ISSCC and first PS2 (+50Mhz, + 3Mtrs, - 16mm2)

what will be the evolution between ISSCC's Cell (90nm) and first PS3's Cell if the PS3's cell is in 65nm?

IMO, the biggest revelation from ISSCC will be the die size of a CELL processor at 90nm and that will nail down alot on what to expect from PS3's CPU...but until we know this it's hard to say. It seems after recent patents that the S|APUs look more complex and beafier designs (transistor wise) than what the original CELL patents implied...

 

[j^aws]

Panajev has posted the PPT below...it quite clearly shows the 250 nm process extending into Fiscal Year 2000 . IIRC, that's after end of March 2000. It extends approx. a quarter into the FY2000, ~ Jun/ Jul 2000. PS2 was launched March 2000 in Japan. Unless they were binning them for fun, the EE was 240 mm2 and the GS was 279 mm2 at launch there.

Pana is posting IR material... It's fluff, and not exactly precise... The SCPH-10000 launched with the CXD9542GB (EE w/die area of approx. 224mm2 (and should note that a later revised EE (CXD9615GB) replaced it) and the CXD2934GB (GS w/die area of approx. 188mm2). That's about as specific as I can get with you... The micrographs you see of the EE and GS on the far left are from the original models that didn't even run at the released clock speed...

ASC7PL (.18µm) became available Q4 FY99, and in Q1 FY2000 ASC7DL (DRAM) was available for full blown ASC7 GS parts (although IIRC volume didn't really pick up until 2H FY2000)...

http://www.beyond3d.com/forum/viewtopic.php?p=357391#357391

EE launched at 180nm on PS2 according to Archie4oz, and he seems very sure...

no, apparently the EE version 2 with 224mm2 is a 250nm process in accordance with the officials papers, look the precedent image

I've disputed this with Archie4oz, and he disagrees with this PR...and he's positive that they launched EE at 180nm on PS2 as I've linked above. Maybe he needs to be summoned!

 

[Quaz51]

and the EE3 with the same process (180nm) down to 110mm²??
no, i don't believe this, the EE1 and EE2 are in 250nm (this is what sony say in official paper, EE 224mm² is in 250nm) and the EE3 is in 180nm, this is more logic

 

[j^aws]

I think we can agree the the EE launched on a 224mm2 die. The dispute is whether that 224mm2 was on 180nm or 250nm...and that PR roadmap isn't very clear as it's showing the 224mm2 overlapping on both 250/180nm process but the majority of the die is in the 180nm section...so that graph doesn't match... :?

 

[Quaz51]

I think we can agree the the EE launched on a 224mm2 die. The dispute is whether that 224mm2 was on 180nm or 250nm...and that PR roadmap isn't very clear as it's showing the 224mm2 overlapping on both 250/180nm process but the majority of the die is in the 180nm section...so that graph doesn't match... :?

the PR roadmap don't give precise information on the process
but this yes

and other doc say 224mm² chip is in 250nm
and otherwise how explain EE3 in 180nm down at 110mm² if EE2 is already in 180nm

 

[Quaz51]

another PDF

and in another doc:

conclusion:

first PS2 are laucnh with a 224mm² EE with 13.5Mtrs in 250nm process

 

[j^aws]

ROFL...

I know...I know, I've been there already!

Also from 240mm2 to 224mm2, you also have an increase in transistors ~25 % to 13.5 Million and a reduction in area ~10 % ...all whilst still remaining on the same process of 250nm :? ...Or a reduction in process to 180nm? :?

...
ASC7PL (.18µm) became available Q4 FY99...

Someone take some elixir and summon Archie to clear this up!

 

[Quaz51]

ROFL...

I know...I know, I've been there already!

Also from 240mm2 to 224mm2, you also have an increase in transistors ~25 % to 13.5 Million and a reduction in area ~10 % ...all whilst still remaining on the same process of 250nm :? ...Or a reduction in process to 180nm? :?

the EE2 is an optimal version of the EE1 (probably an approximate first version) , when you compare the full-screen micrograph of EE1 and EE2 above you see that the same process (approximatly the same size for all units) but with a best layout
contrariwise, the EE3 is very different and small compared to EE2 because the EE3 is the first in 180nm

 

[Quaz51]

the 180nm process was used maybe at first for product the GS of the first PS2, in fact the GS2 188mm² for the launch of the PS2 was probably in 180nm (compared at GS1 279mm² in 250nm, the difference is big) but the EE2 at launch of the PS2 was again in 250nm
this for me the best and more logic explication

 

[j^aws]

ROFL...

I know...I know, I've been there already!

Also from 240mm2 to 224mm2, you also have an increase in transistors ~25 % to 13.5 Million and a reduction in area ~10 % ...all whilst still remaining on the same process of 250nm :? ...Or a reduction in process to 180nm? :?

the EE2 is an optimal version of the EE1 (probably an approximate first version) , when you compare the full-screen micrograph of EE1 and EE2 above you see that the same process (approximatly the same size for all units) but with a best layout
contrariwise, the EE3 is very different and small compared to EE2 because the EE3 is the first in 180nm

I agree...but

...
ASC7PL (.18µm) became available Q4 FY99...

:?