CPU riser board.

Why don't we use CPU riser boards? It would give AMD/Intel the ability to use whichever ram they choose. Plus you wouldn't need to upgrade your motherboard as often since a new CPU would just go in the CPU board slot. I dunno really, it just seemed to me if CPU's had their own board like GPU's we would have alot more bandwidth than we do now.
 
A riser has the problem with getting a whole bunch of pins on a DIMM type setup. You also get a better connection with a PGA of some sort.
 
My guess heat dissipation maybe a problem with a raiser board.
See that most today GPUs are power limited.
 
Saem said:
A riser has the problem with getting a whole bunch of pins on a DIMM type setup. You also get a better connection with a PGA of some sort.
I forget, more pins increase latency right?
 
I'm not sure what exactly you mean, LittlePenny.

If you're talking about propagation delay, then possibly due to the fact that the connection might not be as good and it's harder to clock high with such a parallel interface.

The big problem with more connections on a dual inline module type setup that one would find on a riser board would be cost. First of all getting enough connections isn't going to be easy. Your board can't be THAT wide (cost) and you'll need more connections be cause the connection made by that vs a PGA interface we have now isn't as good. That's one reason why a 64bit DDR bus takes nearly 200 pins on motherboard currently. Also, to get enough lines you might need one of those EISA type double connection line setup. Where just to fit more connections you basically double the width of the insert and then having basically twice the connections. Kinda hard to explain try finding a picture of an EISA card to get an idea of what they look like.

Ultimately, it costs a fair bit more. Besides, with heat spreaders and HS/F you'll need strong bracing mechnisms that won't be that'll be more expensive than the current ones.
 
To be honest I wasn't exactly sure what I was talking about. I thought I remembered reading somewhere that keeping the pin count low is supposed to be better. But, other than that it, the negatives make much more sense to me now, thankyou.
 
The > pin count = > latency. Make sense, if you're talking about a parallel data bus which. If you have a lot of pins and send a signal, all the signals will come out synced. It will look like a straight line. | like that. When it arrives at the end, it'll look more like this, ). So, what you have to do is account for that by widening the amount of "acceptable" skew/error. So, you increase latency, because you basically have to lower your clock, since you need to allow for the appropriate setup and hold times.
 
Back
Top